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Use Cadence Software on a Linux server to simulate logic design flow. Included basic gate structures (AND, OR, Not) using MOSFETS and also integration of gates to make full adders and circuits based on given requirements.

Perl 22.82% Common Lisp 2.67% Verilog 3.41% MATLAB 13.49% Standard ML 0.11% Coq 1.46% Mathematica 3.99% HCL 27.06% M4 1.60% Roff 17.90% Vim Script 5.47%

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