This implemetation is my Bachelor degree final Project! There are some ways and tools to implement a neural network on FPGA, but in this project i design a simple Convolutional neural network on FPGA with VHDL design without Implementation tools. so, you can also download my final Report for this Project in ./report folder (in persian)

• Train a Convolutional neural networks in Pytorch
• Extract all parameters by using ONNX
• Make all parameters Fixed-Point
• Design all part of a CNN model: Convolution, Activation Function, Max-Pooling, Classification part
• Test all module

-> ./VHDL

• FIFO.vhd : Design a First-in First-out Component
• Relu.vhd : Design Relu activation function
• cnn_types.vhd : max-pooling states of state-machine
• filter_one.vhd : crossing
• find_max.vhd : find maximum value for max-pooling window
• main.vhd : all things together
• main_class.vhd : classification part
• main_cnn.vhd : convolution
• main_feature.vhd : convolution + crossing + Relu
• max_pooling.vhd : max-pooling

-> ./Python

• List item

-> ./Testbech In this folder we have several testbench file for testing and simulation modules.

-> ./ISE Project This folder include all files that you can load them in ISE software.

• Amidi, a., & Amidi, S. (n.d.). Stanford CS230 Course. (Link)
• LeCun, Y., Cortes, C., & Burges, C. (n.d.). MNIST handwritten digit database. (Link)
• Xilinx Spartan6. (n.d.). (Link)
• Fixed point representation the q format. (Link)
• NUMERIC_STD arithmetic package for synthesis. (1994, Nov 23). (Link)
• Pedroni, V. (n.d.). Finite State Machines in Hardware. MIT Press
• Chu. (n.d.). FPGA PROTOTYPING BY VHDL EXAMPLES . WILEY-INTERSCIENCE
• Ghaffari, A., & Savaria, Y. (2020). CNN2Gate: An Implementation of Convolutional Neural Networks
  Inference on FPGAs with Automated Design Space Exploration. MDPI.
• Xiao, R., Shi, J., & Zhang, C. (2020). FPGA Implementation of CNN for Handwritten Digit
  Recognition. ITNEC.
• Bailey, D. (2011). DESIGN FOR EMBEDDED IMAGE PROCESSING. John Wiley & Sons