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SHex doesn't allow you to use Goto Offset to jump to bank $70-$7D in a 4MB LoROM game, despite the fact that those banks are valid ROM banks. You specifically have to jump to $F0-$FD for it to work. This isn't the case when doing the same with a HiROM game.

This would be a good feature to have for extracting blocks of data that make sense to be external files, like graphics, tilemaps, level data, .brr samples, etc.

In the process of making disassemblies, I prefer having the .b/.w/.l on every opcode so I can control exactly how asar assembles the opcodes. Since SHex doesn't put them into outputted code, I have to manually add them in, which can take hours of tedious effort. If SHex had a toggle that allows you to set whether the output code has them or not, it would be a massive help to me.

2 things:

-At this moment, does the program now display addresses of each instruction when disassembled?

-When disassembling, does it update whenever there is a REP/SEP so that LDA #$12 and LDA #$1234 are displayed properly? I mean, there are checkboxes saying 16-bit A and 16-bit XY, I'm not sure this makes the program assume that on the first instruction disassembled.

This is a "nice to have" feature more than anything.

Currently SHEX will block whenever a disassembly is requested. Not a big deal for small code snippets, but it does add up for large snippets or whole ROMs. Is it possible to spawn a QThread solely for disassembly whenever a disassembly is requested or (better yet), spawn a disassembler thread on program invocation that blocks until a disassembly is requested?

I'd be more than happy to do this when I get back to SNES hacking.

While I'm working on a disassembly, I frequently use SHex to compare the ROM I'm assembling with a clean ROM to find where the differences are in order to correct them. Because SHex prevents asar from modifying the assembled ROM, I have to constantly close/reopen the ROM just to prevent SHex from preventing asar from doing its job.

For the record, hex editor HxD reloads a file when it detects the file has been changed by something else. If Shex did this, it would makes things a whole lot less tedious.

I tried to build the program, but it crashes on startup with an assert error:
ASSERT: "uint(i) < uint(size))" in file C:\Qt\5.12.3\mingw73_32\include/QtCore/qbytearray.h, line 481

This seems to occur in the function QVector<int> ROM_buffer::get_rats_tags() const after calling inline unsigned short read_word(const QByteArray&,int), though I'm not sure why.

When disassembling SNES code:

ORA $00,S	-> ORA $00
AND $00,S	-> AND $00
BIT $0000,X	-> BIT $00,X
AND $0000,X	-> AND $00,X
ROL $0000,X	-> ROL $00,X
EOR $00,S	-> EOR $00
MVP $00,$01	-> MVN $0100
MVN $00,$01	-> MVN $0100
ADC $00,S	-> ADC $00
CMP $00,S	-> CMP $00
SBC $00,S	-> SBC $00

When disassembling SPC700 code:

OR $01, $00	-> or $00, $01
OR1 C, $0000	-> or1 c, $0000:$00 : clrp
OR A, $0000+X	-> or a, $0000
OR A, $0000+Y	-> or a, $0000
OR $01, #$00	-> or $00
AND $01, $00	-> and $00, $01
OR1 C, !$0000	-> or1 c, !$0000:$00 : clrp
AND A, $0000+X	-> and a, $0000
AND A, $0000+Y	-> and a, $0000
AND $01, #$00	-> and $00
EOR $01, $00	-> eor $00, $01
AND1 C, $0000	-> and1 c, $0000:$00 : clrp
PCALL $FF00	-> pcall $ff#$00
EOR A, $0000+X	-> eor a, $0000
EOR A, $0000+Y	-> eor a, $0000
EOR $01, #$00	-> eor $00
CMP $01, $00	-> cmp $00, $01
AND1 C, !$0000	-> and1 c, !$0000:$00 : clrp
CMP A, $0000+X	-> cmp a, $0000
CMP A, $0000+Y	-> cmp a, $0000
CMP $01, #$00	-> cmp $00
ADC $01, $00	-> adc $00, $01
EOR1 C, $0000	-> eor1 c, $0000:$00 : clrp
MOV $01, #$00	-> mov $00
ADC A, $0000+X	-> adc a, $0000
ADC A, $0000+Y	-> adc a, $0000
ADC $01, #$00	-> adc $00
SBC $01, $00	-> sbc $00, $01
MOV1 C, $0000	-> mov1 c, $0000:$00 : clrp
MOV (X+), A	-> mov (x)+, a
SBC A, $0000+X	-> sbc a, $0000
SBC A, $0000+Y	-> sbc a, $0000
SBC $01, #$00	-> sbc $00
MOV A, (X+)	-> mov a, (x)+
MOV1 $0000, C	-> mov1 $0000:$00, c : clrp
NOT1 C, $0000	-> not1 c, $0000:$00 : clrp
MOV A, $0000+X	-> mov a, $0000
MOV A, $0000+Y	-> mov a, $0000
MOV A, ($00)+X	-> mov a, $00+x
MOV $01, $00	-> mov $00, $01

When disassembling GSU code:

ALT1		-> 
ALT2		-> 
ALT3		-> 
BGE $00		-> blt $00
BLT		-> bge $00
LEA R0,$0000	-> iwt r0,#$0000
LM R0,($0000)	-> lm r0 : stop : stop
LM R1,($0000)	-> lm r1 : stop : stop
LM R2,($0000)	-> lm r2 : stop : stop
LM R3,($0000)	-> lm r3 : stop : stop
LM R4,($0000)	-> lm r4 : stop : stop
LM R5,($0000)	-> lm r5 : stop : stop
LM R6,($0000)	-> lm r6 : stop : stop
LM R7,($0000)	-> lm r7 : stop : stop
LM R8,($0000)	-> lm r8 : stop : stop
LM R9,($0000)	-> lm r9 : stop : stop
LM R10,($0000)	-> lm r10 : stop : stop
LM R11,($0000)	-> lm r11 : stop : stop
LM R12,($0000)	-> lm r12 : stop : stop
LM R13,($0000)	-> lm r13 : stop : stop
LM R14,($0000)	-> lm r14 : stop : stop
LM R15,($0000)	-> lm r15 : stop : stop
LMS R0,($00)	-> lms r0,(#$7A00)
LMS R1,($00)	-> lms r1,(#$7A00)
LMS R2,($00)	-> lms r2,(#$7A00)
LMS R3,($00)	-> lms r3,(#$7A00)
LMS R4,($00)	-> lms r4,(#$7A00)
LMS R5,($00)	-> lms r5,(#$7A00)
LMS R6,($00)	-> lms r6,(#$7A00)
LMS R7,($00)	-> lms r7,(#$7A00)
LMS R8,($00)	-> lms r8,(#$7A00)
LMS R9,($00)	-> lms r9,(#$7A00)
LMS R10,($00)	-> lms r10,(#$7A00)
LMS R11,($00)	-> lms r11,(#$7A00)
LMS R12,($00)	-> lms r12,(#$7A00)
LMS R13,($00)	-> lms r13,(#$7A00)
LMS R14,($00)	-> lms r14,(#$7A00)
LMS R15,($00)	-> lms r15,(#$7A00)
MOVE ($00),R0	-> ???
MOVE R0,#$00	-> ???
MOVE R0,($00)	-> ???
MOVE R0,R0	-> ???
MOVEB (R0),R0	-> ???
MOVEB R0,(R0)	-> ???
MOVES R0,R0	-> ???
MOVEW (R0),R0	-> ???
MOVEW R0,(R0)	-> ???
SM ($0000),R0	-> sm r0 : stop : stop
SM ($0000),R1	-> sm r1 : stop : stop
SM ($0000),R2	-> sm r2 : stop : stop
SM ($0000),R3	-> sm r3 : stop : stop
SM ($0000),R4	-> sm r4 : stop : stop
SM ($0000),R5	-> sm r5 : stop : stop
SM ($0000),R6	-> sm r6 : stop : stop
SM ($0000),R7	-> sm r7 : stop : stop
SM ($0000),R8	-> sm r8 : stop : stop
SM ($0000),R9	-> sm r9 : stop : stop
SM ($0000),R10	-> sm r10 : stop : stop
SM ($0000),R11	-> sm r11 : stop : stop
SM ($0000),R12	-> sm r12 : stop : stop
SM ($0000),R13	-> sm r13 : stop : stop
SM ($0000),R14	-> sm r14 : stop : stop
SM ($0000),R15	-> sm r15 : stop : stop
SMS ($00),R0	-> ???
SMS ($00),R1	-> ???
SMS ($00),R2	-> ???
SMS ($00),R3	-> ???
SMS ($00),R4	-> ???
SMS ($00),R5	-> ???
SMS ($00),R6	-> ???
SMS ($00),R7	-> ???
SMS ($00),R8	-> ???
SMS ($00),R9	-> ???
SMS ($00),R10	-> ???
SMS ($00),R11	-> ???
SMS ($00),R12	-> ???
SMS ($00),R13	-> ???
SMS ($00),R14	-> ???
SMS ($00),R15	-> ???

I'm not very experienced with SuperFX coding, so it was a bit hard to tell where some of the opcodes started when disassembling them, but I do know that SHex's disassembly output did not match what I inserted into my test ROM.

If you select Close Compare, then use Open Compare right afterwards, the Shex window will get larger like normal, but there will be a large blank space below the ROM byte display and the second ROM's section won't be aligned with the bottom of the window unless you resize the window to be larger than was needed for the prior comparison. Sometimes, it's even possible for SHex to resize itself in a way where it extends well past the bottom of the screen.

Seeing as how SHex is meant to disassemble code that has been highlighted, it'd make sense for one to be able to do the same for data as well. The idea being that, if you highlight a section of bytes, you can tell SHex to display it as a byte table in the disassembly window. From there, one could adjust the table, like:

• Changing how many bytes are in each row.
• Changing whether the table uses db/dw/dl/dd
• Adjusting how many spaces/tabs are used before the db/dw/dl/dd

Those would be good enough things at the minimum, but if you wanted to go further, some ideas for how else the tables could be modified:

• Designate that the table contains pointers, and therefore change all the entries to use labels (perhaps also specifying what the upper 1-2 bytes are if the table uses db/dw).
• Specifying exactly how the bytes should be laid out per row, allowing for tables like:

db $80 : dl $7FD000 : dw $1000 db $80 : dl $7FE000 : dw $0800

• Outputting the table as ASCII text data. Perhaps one could also give SHex an asar table file to be able to output non-ASCII text data, with unrecognized bytes being output as the hexadecimal byte.

When disassembling SNES code:

• All long indexed opcodes never get assigned a label even if the target address is in range.
• BRL rarely is assigned a label, and when it is, it's usually to the wrong address.
• PER never gets a label even if the target address is in range.

When disassembling SPC700 code:

• All absolute indexed opcodes never get assigned a label even if the target address is in range.
• All relative branch opcodes point one byte ahead of where they should, which results in them showing the wrong address and being placed one line further.
• JMP never gets a label even if the target address is in range.