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migen-axi's Issues

I would like use it with PYNQ board

Hello! I would like to know what is the status of the project. I want to use it but with PYNQ board. Do you have any documentation about how to use migen and vivado to make the hardware wrapper?

Thank you for your answer!

Kevin.

Is anyone working on this project a Uni student?

@PEtut - any chance you or any of your contributors are Uni students?

If so, I would love to see a Migen<->AXI/Zynq intergration proposal as part of the Google Summer of Code (were Google funds students to work on open source projects over their summer break).

The TimVideos, FOSSi Foundation and/or Apertus orgs would all probably be interested in accepting a project around this space if a good student applied!

Migen platform compatibility

In tests/test_integration.py,

zedboard.Platform(name="soc", toolchain="vivado")

should be replaced with simply:

zedboard.Platform()

Those name and toolchain arguments have been removed from Migen.

Tests for AXI2CSR

  • signal list B1.1.1
  • bus width B1.1.2
  • write strobes B1.1.3, memory access slaves must fully support write strobes
  • optional signaling B1.1.4, shall support AXI IDs
  • bridge requirements of AXI4-Lite slaves B1.2.1, requires AXI ID reflection
  • direct connection requirements of AXI4-Lite slaves, B1.2.2, see B1.2.1

See ARM IHI 0022D.

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