peteut / vhdl2008c Goto Github PK

VHDL ieee_proposed library, imported as is. See also https://github.com/FPHDL/fphdl

VHDL 100.00%

vhdl2008c's Introduction

   This is the "ieee_proposed" library.  This is a compatability library,
which is designed to provide all of the functionality of the VHDL-200X-FT
packages in VHDL-93.  The "_c" after the package name is used to denote
that this is a 1993 compliant version of this package.  Otherwise, the
name of the file and the name of the package are the same.

Please compile the following files into a library named "ieee_proposed":
standard_additions_c.vhdl
env_c.vhdl
standard_textio_additions_c.vhdl
std_logic_1164_additions.vhdl
numeric_std_additions.vhdl
numeric_std_unsigned_c.vhdl
fixed_pkg_c.vhdl
float_pkg_c.vhdl


New/Updated functions
A) standard_additions -- Additions to the package "std.standard"
   Use model:
   use ieee_proposed.standard_additions.all;
   Dependancies: None.
   Notes:  The functions "rising_edge" and "falling_edge" are defined in
   this package.  If you use "numeric_bit" they are ALSO defined in that
   package, causing a conflict.  The VHDL-200X-FT version of numeric_bit
   has these functions commented out, as well as the "sll", "srl", "ror"
   and "rol" functions which are implicit.
   New types defined in this package:
      REAL_VECTOR
      TIME_VECTOR
      INTEGER_VECTOR
      BOOLEAN_VECTOR
   New constants defined in this package:
      SIM_RESOLUTION : TIME - returns the simulator's resolution (1 ns default)
   1) "maximum" and "minimum" are defined for all default datatypes
   2) _reduce functions (and_reduce, nand_reduce, or_reduce ...) are defined
      These functions reduce a bit_vector to a single bit.  Example:
      or_reduce ("0101") = '1'.  In VHDL-2006 syntax these will be "or".
   3) "vector" and "bit" operations are defined.  These will perform a
      boolean operation of a vector.  Example:
      "1" xor "1010" = "0101";
   5) /??/ function is defined for "bit" ("??" operator is release)
      if (/??/('1')) then -- will return a "true".
   6) rising_edge and falling_edge functions are defined (see Notes).
   7) to_string function - Converts any of the base types into a string.
      Example: 
      assert (bv = "101") report "result was " & to_string(bv) severity note;
   8) to_hstring and to_ostring function (bit_vector to hex or octal string)
B) standard_textio_additions  - Additions to the package "std.textio"
   Use model:
   use ieee_proposed.standard_textio_additions.all;
   Dependencies: std.textio, ieee_proposed.standard_additions
   1) tee - Echos the string to BOTH the file and the screen
   2) SREAD and SWRITE - String read and write routines (so you no longer
      need to do write (L, string'("ABCEDFG"));
   3) HREAD and HWRITE (Hex read and write) for bit_vector
   4) OREAD and OWRITE (octal read and write) for bit_vector
   5) BREAD and BWRITE (binary read and write, same as "READ" and "WRITE" for
      bit_vector
   6) justify - Justify a string left or right with a width.  Example:
      justify ("ABCD", left, 6); will result in "ABCD  "
C) std_logic_1164_additions - Additions to the package "ieee.std_logic_1164"
   Usage model:
   use ieee.std_logic_1164.all;
   -- use ieee.std_logic_textio.all; -- Comment out, included in "_additions".
   use ieee_proposed.std_logic_1164_additions.all;
   Dependencies: ieee.std_logic_1164
   Note:  The contents of the "std_logic_textio" package have now been
   included in the "std_logic_1164" package, and an EMPTY "std_logic_textio"
   package is provided in the new release.
   1) Short had aliases:
      a) to_bv - calls "to_BitVector"
      b) to_slv - calls "to_StdLogicVector"
      c) to_suv - calls "to_stdULogicVector"
   2) Long hand aliases:
      a) to_bit_vector - calls "to_BitVector"
      b) to_std_logic_vector - calls "to_StdLogicVector"
      c) to_std_ulogic_vector - calls "to_StdULogicVector"
   3) _reduce functions (and_reduce, nand_reduce, or_reduce ...) are defined
      These functions reduce a std_logic_vector (or ulogic) to a single bit.
      In vhdl-2006 these will be unary "or", example "or "11011" = '1'"
   4) "vector" and "std_ulogic" operations are defined.  These will perform a
      boolean operation of a vector.  Example:
      "1" xor "1010" = "0101";
   5) "std_ulogic" and "boolean" operations are defined.  Thus:
      if '1' and true then  -- returns a "true".
   6) "\??\" function is defined for "std_ulogic" ("??" operator is release)
      if (bool('1')) then -- will return a "true".
   7) READ and WRITE procedures for "std_logic_vector", "std_ulogic_vector"
      and "std_ulogic" are defined.
   8) HREAD and HWRITE (Hex read and write) for std_logic_vector
      and std_ulogic_vector.  These are more "forgiving" than the ones
      originally from "std_logic_textio"
   9) OREAD and OWRITE (octal read and write) for std_logic_vector
      and std_ulogic_vector.  These are more "forgiving" than the ones
      originally from "std_logic_textio"
   10) BREAD and BWRITE (binary read and write, same as "READ" and "WRITE" for
      std_logic_vector and std_ulogic_vector.
   11) to_string function - Converts a "std_ulogic", "std_logic_vector" or
      "std_ulogic_vector" types into a string.
      Example: 
      assert (slv = "101") report "result was " & to_string(slv) severity note;
   12) to_hstring and to_ostring function (std_(u)logic_vector to hex or octal
      string)
D) numeric_std_additions - additions the the package "ieee.numeric_std"
   Usage Model:
   use ieee.std_logic_1164.all;
   use ieee.numeric_std.all;
   use ieee_proposed.numeric_std_additions.all;
   Dependencies: ieee.std_logic_1164, ieee.numeric_std
   1) SIGNED or UNSIGNED + std_ulogic operators
   2) SIGNED or UNSIGNED - std_ulogic operators
   3) type UNRESOLVED_UNSIGNED (aliased to U_UNSIGNED) is an unresolved
      verion of UNSIGNED.  It is aliased to "UNSIGNED" for compatability.
   4) type UNRESOLVED_SIGNED (aliased to U_SIGNED) is an unresolved
      verion of SIGNED.  It is aliased to "SIGNED" for compatability.
   5) \?=\, \?/=\ - similar to "std_match", but return std_ulogic values.
      \?<\, \?<=\, \?>\, \?>=\ - compare functions which retrun std_ulogic.
      (these will be "?="... operators in the release)
   7) To_X01, To_X01Z, To_U01X, Is_X - same as std_logic_1164 functions,
      but overloaded for SIGNED and UNSIGNED.
   8) "sla" and "sra" - Mathmetically correct versions of these functions.
   9) minimum and maximum - smaller or larger of two SIGNED or UNSIGNED values.
   10) find_rightmost and find_leftmost - finds the first bit in a string.
       Example:
     find_leftmost (c12, '1'); -- returns the Log2 of "c12".
     returns -1 if not found.
   11) _reduce functions (and_reduce, nand_reduce, or_reduce ...) are defined
      These functions reduce a SIGNED or an UNSIGNED to a single bit.
      (will overload the "or" and "and", ... operators in the release)
   12) SIGNED or UNSIGNED and "std_ulogic" operations are defined. 
      These will perform a boolean operation of a vector.  Example:
      "1" xor "1010" = "0101";
   13) READ and WRITE procedures for "SIGNED", and "UNSIGNED" are defined.
   14) HREAD and HWRITE (Hex read and write) for SIGNED and UNSIGNED.
      These are more "forgiving" than the ones
      originally from "std_logic_textio"
   15) OREAD and OWRITE (octal read and write) for "SIGNED" and "UNSIGNED.
      These are more "forgiving" than the ones
      originally from "std_logic_textio"
   16) BREAD and BWRITE (binary read and write, same as "READ" and "WRITE" for
      SIGNED and UNSIGNED.
   17) to_string function - Converts a "SIGNED" or "UNSIGNED" types into a
      string.  Example: 
      assert (UNS = "101") report "result was " & to_string(UNS) severity note;
   18) to_hstring and to_ostring function (SIGNED or UNSIGNED to hex or octal
      string)
E) numeric_std_unsigned  - Simular to the "std_logic_unsigned" packages, but
   with all of the functionality of the "numeric_std" package.
   use model:
   use ieee.std_logic_1164.all;
   use ieee_proposed.numeric_std_unsigned.all;
   dependencies: ieee.numeric_std, ieee_proposed.numeric_std_additions

F) For fixed point package:
use model:
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
See fixed point package documentation
http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/Fixed_ug.pdf

G) For floating point package:
use model:
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
use ieee_proposed.float_pkg.all;
See floating point package documentation
http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/Float_ug.pdf

vhdl2008c's People

Contributors

Stargazers

Watchers

Forkers

klevler posic sandysunny99 zhang-jinyu gkaggarwal dahmadjid

vhdl2008c's Issues

Cannot compile

I'm using ISE 14.7 in a project.

I created a new library called "ieee_proposed" and added all the sources from this git repository.

When synthesizing I get:

Started : "Synthesize - XST".
Running xst...
Command Line: xst -intstyle ise -ifn "/project/TopLevel.xst" -ofn "/project/TopLevel.syr"
Reading design: TopLevel.prj

=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "/project/lib/ieee_proposed/math_utility_pkg.vhdl" in Library ieee_proposed.
Compiling vhdl file "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" in Library ieee_proposed.
Package <fixed_pkg> compiled.
WARNING:HDLParsers:3350 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 1475. Null range: 0 downto 1
WARNING:HDLParsers:3350 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 1476. Null range: 0 downto 1
WARNING:HDLParsers:3350 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 1477. Null range: 0 downto 1
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2058. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2077. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2092. Attribute instance_name cannot be used here.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2280. Wrong index type for to_stdlogicvector.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2287. Wrong index type for to_stdlogicvector.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2301. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2326. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2552. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2593. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 2695. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3195. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3210. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3225. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3240. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3255. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3270. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3292. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3307. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3322. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3337. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3352. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3367. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3686. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3707. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3728. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3749. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3770. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3791. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3812. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3833. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3854. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3875. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3896. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3917. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3937. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3950. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3968. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3974. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 3996. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4002. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4024. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4030. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4052. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4058. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4080. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4086. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4108. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4114. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4136. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4142. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4164. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4170. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4192. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4198. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4220. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4226. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4248. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4254. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4276. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4282. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4383. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4436. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4481. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4488. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4536. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4855. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 4877. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 5018. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 5049. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 5076. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 5106. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 5130. Attribute instance_name cannot be used here.
ERROR:HDLParsers:1303 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 5146. Attribute instance_name cannot be used here.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8319. Wrong index type for to_stdulogicvector.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8320. Formal port left_index does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8318. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8320. Formal port left_index does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8318. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8320. Formal port left_index does not exist in to_ufixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8320. Formal port left_index does not exist in to_ufixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8320. Formal port left_index does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8318. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8320. Formal port left_index does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8318. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8320. Formal port left_index does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8318. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8330. Wrong index type for to_stdulogicvector.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8329. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8331. Formal port size_res does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8329. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8331. Formal port size_res does not exist in to_ufixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8331. Formal port size_res does not exist in to_ufixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8331. Formal port size_res does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8329. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8331. Formal port size_res does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8329. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8331. Formal port size_res does not exist in to_ufixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8329. Formal arg of to_ufixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8331. Formal port size_res does not exist in to_ufixed.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8341. Wrong index type for to_stdulogicvector.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8342. Formal port left_index does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8340. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8342. Formal port left_index does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8340. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8342. Formal port left_index does not exist in to_sfixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8342. Formal port left_index does not exist in to_sfixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8342. Formal port left_index does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8340. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8342. Formal port left_index does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8340. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8342. Formal port left_index does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8340. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8352. Wrong index type for to_stdulogicvector.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8351. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8353. Formal port size_res does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8351. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8353. Formal port size_res does not exist in to_sfixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8353. Formal port size_res does not exist in to_sfixed.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8353. Formal port size_res does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8351. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8353. Formal port size_res does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8351. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8353. Formal port size_res does not exist in to_sfixed.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8351. Formal arg of to_sfixed with no default value must be associated with an actual value.
ERROR:HDLParsers:850 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8353. Formal port size_res does not exist in to_sfixed.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8364. Wrong index type for to_stdulogicvector.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8363. Formal arg of to_UFix with no default value must be associated with an actual value.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8363. Formal arg of to_UFix with no default value must be associated with an actual value.
ERROR:HDLParsers:821 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8377. Wrong index type for to_stdulogicvector.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8376. Formal arg of to_SFix with no default value must be associated with an actual value.
ERROR:HDLParsers:851 - "/project/lib/ieee_proposed/fixed_pkg_c.vhdl" Line 8376. Formal arg of to_SFix with no default value must be associated with an actual value.
--> 


Total memory usage is 499984 kilobytes

Number of errors   :  131 (   0 filtered)
Number of warnings :    3 (   0 filtered)
Number of infos    :    0 (   0 filtered)


Process "Synthesize - XST" failed

Any suggestions?

Links at bottom of README are dead

The links at the bottom of the README file are dead.

http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/Fixed_ug.pdf
http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/Float_ug.pdf

Recommend Projects

React

A declarative, efficient, and flexible JavaScript library for building user interfaces.
Vue.js

🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
Typescript

TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
TensorFlow

An Open Source Machine Learning Framework for Everyone
Django

The Web framework for perfectionists with deadlines.
Laravel

A PHP framework for web artisans
D3

Bring data to life with SVG, Canvas and HTML. 📊📈🎉

Recommend Topics

javascript

JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
web

Some thing interesting about web. New door for the world.
server

A server is a program made to process requests and deliver data to clients.
Machine learning

Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Visualization

Some thing interesting about visualization, use data art
Game

Some thing interesting about game, make everyone happy.

Recommend Org

Facebook

We are working to build community through open source technology. NB: members must have two-factor auth.
Microsoft

Open source projects and samples from Microsoft.
Google

Google ❤️ Open Source for everyone.
Alibaba

Alibaba Open Source for everyone
D3

Data-Driven Documents codes.
Tencent

China tencent open source team.