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vlink's Introduction

Vlink

Design files for a virtual link

Files

Top level design file Top level creating the transmitter - channel - reciever chain

Components

VLINK Virtual link

FIR Finite Impulse Response : perfroms a filtering of digital quantized numbers

LFSR Logic feedback shift register : generates a random stream used for scrambling / descrambling purpose

PRBS Pseudo Random Bit Stream : generates and recieves a random bits stream and supports sequence error detection

PSK Phase shift keying : perfrom (currently) the BPSK modulation and demodulation

SEI Systematic Error Insertion : systematically inserts a bit error in the incoming stream

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