Topic: stuck-at-faults Goto Github
Some thing interesting about stuck-at-faults
Some thing interesting about stuck-at-faults
stuck-at-faults,Generation of test pattern or input vector for a given circuit consisting of stuck-at faults and to also determine the expected output. Submitted as part of the Grand Finale of Google Girl Hackathon 2023.
User: agarwalharshal
stuck-at-faults,RiscV Environment for Simulation (R4VES) is a generic and modular framework that eases the grunt work required in order to perform pre/post-synthesis logic and fault simulation on RISC-V cores based on Model/QuestaSim and Z01X.
Organization: cad-polito-it
stuck-at-faults,Path-Oriented Decision Making (PODEM) algorithm for Automatic Test Pattern Generation (ATPG).
User: kanndil
stuck-at-faults,Fault injection environment (finjenv) of permanent hardware faults for various arithmetic circuits based on QuestaSIM logic simulator
User: nikosdelijohn
stuck-at-faults,Implementation of "Low-Cost and Effective Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks." 2021 58th ACM/IEEE Design Automation Conference (DAC).
User: thnguyen996
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