Comments (4)
So far, when viewing the ctrls_descr_alpha
, we have:
>>> ctrls_descr_alpha['X-0-M']['P1_WEST_ASIC_3']
[
{'hybrid': 'P1', 'dcb_idx': 2, 'ctrl_signal_type': 'DC_OUT_RCLK5_P'},
{'hybrid': 'P1', 'dcb_idx': 0, 'ctrl_signal_type': 'EC_HYB_i2C_SCL_5'},
{'hybrid': 'P1', 'dcb_idx': 2, 'ctrl_signal_type': 'EC_HYB_i2C_SCL_5'},
{'hybrid': 'P1', 'dcb_idx': 0, 'ctrl_signal_type': 'DC_OUT_RCLK5_P'},
{'hybrid': 'P1', 'dcb_idx': 2, 'ctrl_signal_type': 'EC_RESET_GPIO_5'}, {'hybrid': 'P1', 'dcb_idx': 2, 'ctrl_signal_type': 'EC_HYB_i2C_SDA_5'},
{'hybrid': 'P1', 'dcb_idx': 0, 'ctrl_signal_type': 'EC_HYB_i2C_SDA_5'},
{'hybrid': 'P1', 'dcb_idx': 2, 'ctrl_signal_type': 'MC_TFC5_P'},
{'hybrid': 'P1', 'dcb_idx': 0, 'ctrl_signal_type': 'EC_RESET_GPIO_5'},
{'hybrid': 'P1', 'dcb_idx': 0, 'ctrl_signal_type': 'MC_TFC5_P'}]
>>> ctrls_descr_alpha['X-0-M']['P1_WEST_ASIC_3']
from ut-backplane-mapping.
Near complete. TODO: deal with the exceptional thermistors rerouted to telemetry breakout boards (JT)
- On Medium Flex, P4 always go to telemetry
- If populated, P1_EAST and P2_WEST always go to telemetry
This is to be done by directly editing the .yml input files:
JT | JP | Hybrid thermistor |
---|---|---|
0 | 0 | P4, P1_EAST |
0 | 1 | P1_EAST, P2_WEST |
0 | 2 | P1_EAST, P2_WEST |
0 | 3 | P4, P1_EAST |
1 | 4 | P4, P1_EAST |
1 | 5 | P1_EAST |
1 | 6 | P1_EAST |
1 | 7 | P4, P1_EAST |
2 | 8 | P4 |
2 | 9 | |
2 | 10 | |
2 | 11 | P4 |
from ut-backplane-mapping.
For these EC_ADC
channels, we need to update the AltiumNetlistGen.py
so that they have correct netnames, because they should be connected to JT
, instead of GND
.
from ut-backplane-mapping.
After spot-checking, consider this fully implemented.
from ut-backplane-mapping.
Related Issues (20)
- Convert input Excel files to yaml
- Clarification needed: DCB trace depopulation on beta and gamma backplane HOT 1
- Steps for remapping HOT 1
- To optimize the GBTx assignment table HOT 1
- To implement simple swapping of DCB indices for minimizing trace-crossing HOT 2
- Auxiliary list for depopulated signals and more HOT 1
- Additional error-checking of pin assignments HOT 6
- Additional cases for name matching of differential pairs HOT 2
- Question about Excel files generation HOT 2
- incorrect "Alpha only"-info in backplane_mapping_PT.yml
- connector swaps for turning True-Type schematic into Mirror-Type HOT 1
- Netlist inconsistency not detected HOT 1
- Nets Being questioned HOT 14
- Reference table for depopulation of hybrids (4-ASIC groups) HOT 1
- Possible error on checking depopulation components HOT 2
- Inconsistencies between copy-paste list and implemented netlist HOT 3
- mirror-type inconsistencies reported by the current netlist checker HOT 4
- AsicToFiberMapping: Mirror BP's DCB indices need to be updated HOT 3
- Additional netlist error-checking: depopulation resistors' reference designator flags HOT 7
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from ut-backplane-mapping.