Comments (7)
Currently, the idea is the following:
- To check
RB
mislabeled asR
: List all elink and control nets inJP0-11
that are not for reference only (FRO
), and see if they contain aR
. If they do, theR
s are wrong - To check
RBSP
mislabeled asRB
: List all elinks and control nets inJP8-11
that has aRB
, and see if the net involves only the 4th elinks of a hybrid. If not, theRB
s are wrong.
from ut-backplane-mapping.
I manually changed the net:
(net "JD7_JP8_EC_RESET_GPIO_1_N"
(node "C186" "2")
(node "JP8" "i22")
; (node "RBSP_3" "1") original
(node "RB_3" "1") ; manually changed to make sure the checker works
(attr "DifferentialPair" "True" (textStyleRef "(Default)"))
)
I can confirm that the RBSP
mislabeled as RB
is also effective:
Incorrectly labeled resistor RB_3 found in JD7_JP8_EC_RESET_GPIO_1_N
Incorrectly labeled resistor R41 found in JD3_JP3_EC_HYB_i2C_SDA_1_P
Incorrectly labeled resistor R42 found in JD3_JP3_EC_HYB_i2C_SCL_1_P
Incorrectly labeled resistor R44 found in JD3_JP2_EC_RESET_GPIO_5_P
Incorrectly labeled resistor R43 found in JD3_JP2_EC_RESET_GPIO_3_P
from ut-backplane-mapping.
Finally, these are the real problems:
Incorrectly labeled resistor R41 found in JD3_JP3_EC_HYB_i2C_SDA_1_P
Incorrectly labeled resistor R42 found in JD3_JP3_EC_HYB_i2C_SCL_1_P
Incorrectly labeled resistor R44 found in JD3_JP2_EC_RESET_GPIO_5_P
Incorrectly labeled resistor R43 found in JD3_JP2_EC_RESET_GPIO_3_P
from ut-backplane-mapping.
Great, the real ones listed above agree with my checking by eye, and you can find RBSP
mislabeled as RB
. There's one more thing: find RBSP
mislabeled as RSP
, since I found these shown in https://github.com/umd-lhcb/lab-notes/issues/55#issuecomment-563005216.
from ut-backplane-mapping.
I added a new rule to list all RSP_\d+
resistors, on the assumptions that all these are mislabeled and require manual annotation. Here's the result:
Incorrectly labeled resistor RSP_5 found in JD11_JPL2_1V5
Incorrectly labeled resistor RSP_4 found in JD11_AGND
Incorrectly labeled resistor RSP_2 found in JD11_10_JPL2_2V5
Incorrectly labeled resistor RSP_3 found in JD10_JPL2_1V5
Incorrectly labeled resistor RSP_1 found in JD10_AGND
Incorrectly labeled resistor R41 found in JD3_JP3_EC_HYB_i2C_SDA_1_P
Incorrectly labeled resistor R42 found in JD3_JP3_EC_HYB_i2C_SCL_1_P
Incorrectly labeled resistor R44 found in JD3_JP2_EC_RESET_GPIO_5_P
Incorrectly labeled resistor R43 found in JD3_JP2_EC_RESET_GPIO_3_P
Incorrectly labeled resistor RSP_1, RSP_2, RSP_3, RSP_4, RSP_5 found in GND
from ut-backplane-mapping.
Great, I'll merge this and close the issue now.
from ut-backplane-mapping.
These are the mirror backplane errors:
Incorrectly labeled resistor RSP_2 found in JD11_JPL2_1V5
Incorrectly labeled resistor RSP_1 found in JD11_AGND
Incorrectly labeled resistor RSP_4 found in JD11_10_JPL2_2V5
Incorrectly labeled resistor RSP_5 found in JD10_JPL2_1V5
Incorrectly labeled resistor RSP_3 found in JD10_AGND
Incorrectly labeled resistor R95 found in JD2_JP1_EC_HYB_i2C_SDA_1_P
Incorrectly labeled resistor R96 found in JD2_JP1_EC_HYB_i2C_SCL_1_P
Incorrectly labeled resistor R98 found in JD2_JP0_EC_RESET_GPIO_5_P
Incorrectly labeled resistor R97 found in JD2_JP0_EC_RESET_GPIO_3_P
Incorrectly labeled resistor RSP_1, RSP_2, RSP_3, RSP_4, RSP_5 found in GND
from ut-backplane-mapping.
Related Issues (20)
- Convert input Excel files to yaml
- Clarification needed: DCB trace depopulation on beta and gamma backplane HOT 1
- Steps for remapping HOT 1
- To optimize the GBTx assignment table HOT 1
- To implement simple swapping of DCB indices for minimizing trace-crossing HOT 2
- Auxiliary list for depopulated signals and more HOT 1
- Additional error-checking of pin assignments HOT 6
- Additional cases for name matching of differential pairs HOT 2
- Question about Excel files generation HOT 2
- incorrect "Alpha only"-info in backplane_mapping_PT.yml
- connector swaps for turning True-Type schematic into Mirror-Type HOT 1
- Netlist inconsistency not detected HOT 1
- Nets Being questioned HOT 14
- Reference table for depopulation of hybrids (4-ASIC groups) HOT 1
- to include control signals in the UT-system ASIC-Fiber mapping HOT 4
- Possible error on checking depopulation components HOT 2
- Inconsistencies between copy-paste list and implemented netlist HOT 3
- mirror-type inconsistencies reported by the current netlist checker HOT 4
- AsicToFiberMapping: Mirror BP's DCB indices need to be updated HOT 3
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from ut-backplane-mapping.