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esp-llvm's Introduction

Low Level Virtual Machine (LLVM)

This directory and its subdirectories contain source code for the Low Level Virtual Machine, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of the license agreement found in LICENSE.txt.

Please see the documentation provided in docs/ for further assistance with LLVM, and in particular docs/GettingStarted.rst for getting started with LLVM and docs/README.txt for an overview of LLVM's documentation setup.

If you're writing a package for LLVM, see docs/Packaging.rst for our suggestions.

RISC-V LLVM Support

Author : Colin Schmidt ([email protected])
Date : February 24, 2014
Version : (under version control)

This repository contains a new target for LLVM RISC-V. It supports the latest version of the ISA 2.0. This backend currently only supports assembly generation and riscv64-unknown-*-gcc must be used to assemble and link the executable. The RISCV branch is based on LLVM 3.3 and, the riscv-trunk branch is following upstream LLVM master.

The backend is structured similarly to most other LLVM backends and tries to use the tablegen format as much as possible. The description of the instructions are found in RISCVInstFormats.td, and RISCVInstrInfo*.td. The registers are described in RISCVRegisterInfo.td and the calling convention is described in RISCVCallingConv.td.

The instructions are defined using the LLVM IR DAG format, and simple instructions that use pre-existing LLVM IR operations should be very easy to add. The instructions are divided into separate files based on their extension, e.g. atomic operations are defined in RISCVInstInfoA.td. Instructions implemented with these patterns are simply matched against the programs LLVM IR DAG for selection. More complicated instructions can use C++ to perform custom lowering of the LLVM IR in RISCVISelLowering.cpp. Combining of multiple LLVM IR nodes into single target instructions is also possible using C++ in the same file. In general RISCVISelLowering.cpp sets up the lowering based on the ISA and the specific subtargets features.

This backend does not include all features of a backend but is focused on generating assembly in an extensible way such that adding new ISA extensions and using them should be relatively painless. As the RISC-V support develops the backend may provide more features.

The compiler is fairly robust with similar performance to riscv64-unknown-*-gcc, so it use in any and all projects is encouraged.

Feedback and suggestions are welcome.

Installation

The LLVM RISCV backend is built just as the normal LLVM system.

$ git clone -b RISCV https://github.com/riscv/riscv-llvm.git
$ git submodule update --init
$ mkdir build
$ cd build

$ cmake -DCMAKE_INSTALL_PREFIX=/opt/riscv -DLLVM_TARGETS_TO_BUILD="RISCV" ../ $ make $ make install

Now if /opt/riscv is on your path you should be able to use clang and LLVM with RISC-V support.

Use

Using the llvm-riscv is fairly simple to build a full executable however you need riscv64-unknown-*-gcc to do the assembling and linking. An example of compiling hello world:

$ cat hello.c
#include <stdio.h>
int main() {
    printf("Hello World!\n");
}
$ clang -target riscv64 -mriscv=RV64IAMFD -S hello.c -o hello.S
$ riscv64-unknown-elf-gcc -o hello.riscv hello.S

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esp-llvm's Issues

clang compile error of hello.c

I built clang and the gcc tools on my Ubuntu 13-04 linux box with a fork riscv-tools from yesterday.

The gcc tools compile and spike runs hello.c:

wink@ssi-primary:~/prgs/test$ cat hello.c

include <stdio.h>

int main() {
printf("Hello World\n");
}

wink@ssi-primary:~/prgs/test$ riscv-gcc -o hello hello.c

wink@ssi-primary:~/prgs/test$ spike pk hello
Hello World

But clang fails using the suggested command line from here:

wink@ssi-primary:~/prgs/test$ clang -target riscv -mriscv=RV64IAMFD -S hello.c -o hello.S
In file included from hello.c:1:
In file included from /usr/include/stdio.h:27:
In file included from /usr/include/features.h:341:
/usr/include/stdc-predef.h:30:10: fatal error: 'bits/predefs.h' file not found

include <bits/predefs.h>

1 error generated.

It seems the include paths aren't setup correctly, so I looked around and adding "-nostdinc -I/opt/riscv/riscv-elf/include -I/opt/riscv/lib/clang/3.3/include" worked, but I have a feeling there is a better and more correct way:

wink@ssi-primary:~/prgs/test$ clang -target riscv -mriscv=RV64IAMFD -nostdinc -I/opt/riscv/riscv-elf/include -I/opt/riscv/lib/clang/3.3/include -S hello.c -o hello.S

wink@ssi-primary:~/prgs/test$ cat hello.S
.file "hello.c"
.text
.globl main
.align 4
.type main,@function
main:
addi x14, x14, -32
sd x1, 24(x14)
sd x31, 16(x14)
sd x2, 8(x14)
add x2, x0, x14
lui x16, %hi(.L.str)
addi x18, x16, %lo(.L.str)
jal printf
sw x16, 4(x2)
addiw x16, x0, 0
add x14, x0, x2
ld x2, 8(x14)
ld x31, 16(x14)
ld x1, 24(x14)
addi x14, x14, 32
ret
.Ltmp3:
.size main, .Ltmp3-main

.type   .L.str,@object
.section    .rodata.str1.1,"aMS",@progbits,1

.L.str:
.asciz "Hello World\n"
.size .L.str, 13

.section    ".note.GNU-stack","",@progbits

wink@ssi-primary:~/prgs/test$ riscv-gcc -o hello.riscv hello.S

wink@ssi-primary:~/prgs/test$ spike pk hello.riscv
Hello World

Let me know if there is more information is needed.

test/CodeGen/RISCV/jal.ll fails in a debug build

$ build/bin/llc < test/CodeGen/RISCV/jal.ll 
        .text
        .file   "<stdin>"

# Machine code for function f1: Post SSA

BB#0: derived from LLVM BB %entry
        %vreg1<def> = COPY %ra; GR32Bit:%vreg1
        %a0<def> = COPY %vreg1; GR32Bit:%vreg1
        RET %a0<imp-def,dead>, %a1<imp-def,dead>, %a0<imp-use,kill>

# End machine code for function f1.

*** Bad machine code: Using an undefined physical register ***
- function:    f1
- basic block: BB#0 entry (0x2b24c68)
- instruction: %vreg1<def> = COPY- operand 1:   %ra
LLVM ERROR: Found 1 machine code errors.

Since the machine code snippet uses ra, the error seems to be related to the llvm.returnaddress intrinsic, which is called in jal.ll.

Unknown target triple error

Hi llvm maintainers,

I can build the llvm on 64-bit ubuntu, but I got error when I compile the *.c code using:
clang -target riscv64 -mriscv=RV64IAMFD -S hello.c -o hello.S

The error is:
error: unknown target triple 'riscv64', please use -triple or -arch

Did I miss something? I am on the commit 8aec2ae.

Thanks.

-barrier gets registered twice

Repro:
commit a65ba4c
configured with --enable-shared --enable-optimized REQUIRES_RTTI=1
I'm using a private version of POCL, which calls llvm with a certain set of options to compile a 'kernel.cl' file.

Two passes with the same argument (-barriers) attempted to be registered!
UNREACHABLE executed at /home/meister/dec/pca/runtime/riscv/riscv-llvm/include/llvm/IR/LegacyPassNameParser.h:74!
make: *** [kernel.rv.S] Aborted (core dumped)

Looking at PassManagerBuilder.cpp, there are paths with which this module pass gets registered twice.

Poor basic block scheduling/branch optimization

The following code produces sub-optimal code:

extern void f(void);

void f2(int test) {
    switch (test) {
    case 1:
        f();
        break;
    case 2:
        f();
        break;
    case 3:
        f();
        break;
    case 4:
        f();
        break;
    }
}

Running it with

clang -mriscv=RV64IAMFD -target riscv64 -S -O3 -o invalid-branch.c.64Full.S invalid-branch.c

produces

f2:
  addi  x2, x2, -16
  sd  x1, 8(x2)
  sd  x8, 0(x2)
  add x8, x2, x0
  li  x5, 2
  blt x5, x10, LBB0_3
  li  x6, 1
  beq x10, x6, LBB0_5
  beq x10, x5, LBB0_5
  j LBB0_6
LBB0_3:
  li  x5, 3
  beq x10, x5, LBB0_5
  li  x5, 4
  bne x10, x5, LBB0_6
LBB0_5:
  lui x5, %hi(f)
  addi  x5, x5, %lo(f)
  jalr  x1, x5, 0
LBB0_6:
  add x2, x8, x0
  ld  x8, 0(x2)
  ld  x1, 8(x2)
  addi  x2, x2, 16
  ret

which is not as good as the riscv-gcc version, most likely due to the implementation of analyze branch and associated target specific code in llvm

riscv64-unknown-elf-gcc -O3 -S -o invalid-branch.c.64Full.gcc.S invalid-branch.c

produces

f2:
  li  a5,2
  beq a0,a5,.L7
  ble a0,a5,.L9
  li  a5,3
  beq a0,a5,.L7
  li  a5,4
  bne a0,a5,.L10
.L7:
  tail  f
.L9:
  li  a5,1
  beq a0,a5,.L7
  ret
.L10:
  ret

riscv-llvm bug fixes

Hello, I want to share the bug fixes for riscv-llvm and riscv-clang.

You can find the repository with the fixes applied at the following urls:
https://github.com/jeffy1009/riscv-llvm
https://github.com/jeffy1009/riscv-clang

llvm is based on commit 8713638
clang is based on commit 4cb8b5922c1abdf76bb3c0ed236ecb2fc44779d2
These commits are somewhere between LLVM 3.7 and 3.8.

The latest commits (merge with r275012/3) will break the build.
However, it should be easy to sync with LLVM 3.8.

Some of the fixes are not that pretty. (Please refer to the commit messages)

I could also create a pull request if I have permission (I believe I don't?)

Invalid branch condition code / UNREACHABLE executed at [...]/RISCVInstrInfo.cpp:383

Hi, I ran into the error from the title when playing around a bit with clang.

Here's a minimal testcase:

extern void f(void);

void f2(int test) {
    switch (test) {
    case 1:
        f();
        break;
    case 2:
        f();
        break;
    case 3:
        f();
        break;
    case 4:
        f();
        break;
    }
}

This is the compile command I used (autogenerated from a Makefile with a different target architecture in mind, so not everything makes sense :):

/[...]/riscv-env/bin/clang -cc1 -triple riscv -S -disable-free -main-file-name cvp.c -mrelocation-model static -mdisable-fp-elim -fmath-errno -mconstructor-aliases -target-feature +rv32 -target-feature -rv64 -target-linker-version 2.20.51.0.2 -ffunction-sections -fdata-sections -D "NDEBUG" -O3 -Wextra -Wall -Wno-unused-parameter -Wno-unused-variable -Wno-unused-function -fno-dwarf-directory-asm -ferror-limit 19 -fmessage-length 237 -mstackrealign -fobjc-runtime=gcc -fobjc-default-synthesize-properties -fdiagnostics-show-option -fcolor-diagnostics -backend-option -vectorize-loops -x c cvp-8xKHIQ.c

Here's the full error message:

Invalid branch condition code!
UNREACHABLE executed at /[...]/riscv-tools/riscv-llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:383!
0  clang           0x0000000002e77b25 llvm::sys::PrintStackTrace(_IO_FILE*) + 38
1  clang           0x0000000002e77da2
2  clang           0x0000000002e7781b
3  libpthread.so.0 0x00000035b5e0f710
4  libc.so.6       0x00000035b5632625 gsignal + 53
5  libc.so.6       0x00000035b5633e05 abort + 373
6  clang           0x0000000002e60964 llvm::FoldingSetNodeIDRef::ComputeHash() const + 0
7  clang           0x00000000020b415b llvm::RISCVInstrInfo::InsertBranchAtInst(llvm::MachineBasicBlock&, llvm::MachineInstr*, llvm::MachineBasicBlock*, llvm::SmallVectorImpl<llvm::MachineOperand> const&, llvm::DebugLoc) const + 1625
8  clang           0x00000000020b318d llvm::RISCVInstrInfo::InsertBranch(llvm::MachineBasicBlock&, llvm::MachineBasicBlock*, llvm::MachineBasicBlock*, llvm::SmallVectorImpl<llvm::MachineOperand> const&, llvm::DebugLoc) const + 329
9  clang           0x00000000028f88a1 llvm::BranchFolder::OptimizeBlock(llvm::MachineBasicBlock*) + 2177
10 clang           0x00000000028f7bf7 llvm::BranchFolder::OptimizeBranches(llvm::MachineFunction&) + 135
11 clang           0x00000000028f4b79 llvm::BranchFolder::OptimizeFunction(llvm::MachineFunction&, llvm::TargetInstrInfo const*, llvm::TargetRegisterInfo const*, llvm::MachineModuleInfo*) + 707
12 clang           0x00000000028f4370
13 clang           0x00000000027e2459 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 95
14 clang           0x0000000002dfce9e llvm::FPPassManager::runOnFunction(llvm::Function&) + 290
15 clang           0x0000000002dfd00e llvm::FPPassManager::runOnModule(llvm::Module&) + 84
16 clang           0x0000000002dfd362 llvm::MPPassManager::runOnModule(llvm::Module&) + 556
17 clang           0x0000000002dfd958 llvm::PassManagerImpl::run(llvm::Module&) + 244
18 clang           0x0000000002dfdb63 llvm::PassManager::run(llvm::Module&) + 39
19 clang           0x0000000000ebcbd2
20 clang           0x0000000000ebccad clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::CodeGenOptions const&, clang::TargetOptions const&, clang::LangOptions const&, llvm::Module*, clang::BackendAction, llvm::raw_ostream*) + 136
21 clang           0x0000000000eb8ca0
22 clang           0x0000000001090568 clang::ParseAST(clang::Sema&, bool, bool) + 783
23 clang           0x0000000000c834dc clang::ASTFrontendAction::ExecuteAction() + 298
24 clang           0x0000000000eb81d7 clang::CodeGenAction::ExecuteAction() + 1007
25 clang           0x0000000000c83063 clang::FrontendAction::Execute() + 205
26 clang           0x0000000000c571ac clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) + 720
27 clang           0x0000000000c27724 clang::ExecuteCompilerInvocation(clang::CompilerInstance*) + 1074
28 clang           0x0000000000c17ae6 cc1_main(char const**, char const**, char const*, void*) + 636
29 clang           0x0000000000c21ef7 main + 508
30 libc.so.6       0x00000035b561ed5d __libc_start_main + 253
31 clang           0x0000000000c17219
Stack dump:
0.  Program arguments: /[...]/riscv-env/bin/clang -cc1 -triple riscv -S -disable-free -main-file-name cvp.c -mrelocation-model static -mdisable-fp-elim -fmath-errno -mconstructor-aliases -target-feature +rv32 -target-feature -rv64 -target-linker-version 2.20.51.0.2 -ffunction-sections -fdata-sections -D NDEBUG -O3 -Wextra -Wall -Wno-unused-parameter -Wno-unused-variable -Wno-unused-function -fno-dwarf-directory-asm -ferror-limit 19 -fmessage-length 237 -mstackrealign -fobjc-runtime=gcc -fobjc-default-synthesize-properties -fdiagnostics-show-option -fcolor-diagnostics -backend-option -vectorize-loops -x c cvp-8xKHIQ.c
1.  <eof> parser at end of file
2.  Code generation
3.  Running pass 'Function Pass Manager' on module 'cvp-8xKHIQ.c'.
4.  Running pass 'Control Flow Optimizer' on function '@f2'

A Travis-CI button

Hi, I'm an independent open source guy.

For visibility of our continuous testing efforts, I'd like to have a Travis-CI button. A question comes up, though: Which branch should it track?

Out-of-bounds read using llvm-mc -show-inst-operands

$ echo j 0x10 | build/bin/llvm-mc -show-inst-operands -triple riscv
=================================================================
==783==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60800000ab00 at pc 0x00000050eaa5 bp 0x7ffdb86de190 sp 0x7ffdb86de188
READ of size 8 at 0x60800000ab00 thread T0
    #0 0x50eaa4 in (anonymous namespace)::RISCVAsmParser::parseRegister((anonymous namespace)::RISCVAsmParser::Register&) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build/../lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:545:7
    #1 0x50e29e in (anonymous namespace)::RISCVAsmParser::parseRegister((anonymous namespace)::RISCVAsmParser::Register&, char, unsigned int const*, bool) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build/../lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:603:7
    #2 0x50e29e in (anonymous namespace)::RISCVAsmParser::parseRegister(llvm::SmallVectorImpl<std::unique_ptr<llvm::MCParsedAsmOperand, std::default_delete<llvm::MCParsedAsmOperand> > >&, char, unsigned int const*, (anonymous namespace)::RISCVOperand::RegisterKind, bool) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build/../lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:627
    #3 0x5ebb1d in (anonymous namespace)::AsmParser::parseStatement((anonymous namespace)::ParseStatementInfo&, llvm::MCAsmParserSemaCallback*) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../lib/MC/MCParser/AsmParser.cpp:1635:7
    #4 0x5d8142 in (anonymous namespace)::AsmParser::Run(bool, bool) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../lib/MC/MCParser/AsmParser.cpp:654:10
    #5 0x4eeeba in AssembleInput(char const*, llvm::Target const*, llvm::SourceMgr&, llvm::MCContext&, llvm::MCStreamer&, llvm::MCAsmInfo&, llvm::MCSubtargetInfo&, llvm::MCInstrInfo&, llvm::MCTargetOptions&) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../tools/llvm-mc/llvm-mc.cpp:363:13
    #6 0x4eeeba in main /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../tools/llvm-mc/llvm-mc.cpp:527
    #7 0x7f74a0025b44 in __libc_start_main /tmp/buildd/glibc-2.19/csu/libc-start.c:287
    #8 0x4e8689 in _start (/home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/bin/llvm-mc+0x4e8689)

0x60800000ab00 is located 8 bytes to the right of 88-byte region [0x60800000aaa0,0x60800000aaf8)
allocated by thread T0 here:
    #0 0x4637bb in operator new(unsigned long) (/home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/bin/llvm-mc+0x4637bb)
    #1 0x4fde50 in _ZN4llvm11make_uniqueIN12_GLOBAL__N_112RISCVOperandEJNS2_11OperandKindERNS_5SMLocES5_EEENSt9enable_ifIXntsr3std8is_arrayIT_EE5valueESt10unique_ptrIS7_St14default_deleteIS7_EEE4typeEDpOT0_ /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build/../include/llvm/ADT/STLExtras.h:390:3
    #2 0x4fde50 in (anonymous namespace)::RISCVOperand::createToken(llvm::StringRef, llvm::SMLoc) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build/../lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:108
    #3 0x4fde50 in (anonymous namespace)::RISCVAsmParser::ParseInstruction(llvm::ParseInstructionInfo&, llvm::StringRef, llvm::SMLoc, llvm::SmallVectorImpl<std::unique_ptr<llvm::MCParsedAsmOperand, std::default_delete<llvm::MCParsedAsmOperand> > >&) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build/../lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:722
    #4 0x5eb495 in (anonymous namespace)::AsmParser::parseStatement((anonymous namespace)::ParseStatementInfo&, llvm::MCAsmParserSemaCallback*) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../lib/MC/MCParser/AsmParser.cpp:1623:19
    #5 0x5d8142 in (anonymous namespace)::AsmParser::Run(bool, bool) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../lib/MC/MCParser/AsmParser.cpp:654:10
    #6 0x4eeeba in AssembleInput(char const*, llvm::Target const*, llvm::SourceMgr&, llvm::MCContext&, llvm::MCStreamer&, llvm::MCAsmInfo&, llvm::MCSubtargetInfo&, llvm::MCInstrInfo&, llvm::MCTargetOptions&) /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../tools/llvm-mc/llvm-mc.cpp:363:13
    #7 0x4eeeba in main /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build1/../tools/llvm-mc/llvm-mc.cpp:527
    #8 0x7f74a0025b44 in __libc_start_main /tmp/buildd/glibc-2.19/csu/libc-start.c:287

SUMMARY: AddressSanitizer: heap-buffer-overflow /home/jn/dev/riscv/rocket-chip/riscv-tools/riscv-llvm/build/../lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:545 (anonymous namespace)::RISCVAsmParser::parseRegister((anonymous namespace)::RISCVAsmParser::Register&)
Shadow bytes around the buggy address:
  0x0c107fff9510: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa
  0x0c107fff9520: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa
  0x0c107fff9530: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa
  0x0c107fff9540: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 fa
  0x0c107fff9550: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 fa
=>0x0c107fff9560:[fa]fa fa fa 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c107fff9570: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c107fff9580: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c107fff9590: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c107fff95a0: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c107fff95b0: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 00
Shadow byte legend (one shadow byte represents 8 application bytes):
  Addressable:           00
  Partially addressable: 01 02 03 04 05 06 07 
  Heap left redzone:       fa
  Heap right redzone:      fb
  Freed heap region:       fd
  Stack left redzone:      f1
  Stack mid redzone:       f2
  Stack right redzone:     f3
  Stack partial redzone:   f4
  Stack after return:      f5
  Stack use after scope:   f8
  Global redzone:          f9
  Global init order:       f6
  Poisoned by user:        f7
  Container overflow:      fc
  ASan internal:           fe
==783==ABORTING
0  llvm-mc         0x000000000048b335 backtrace + 149
1  llvm-mc         0x00000000007012b2 llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 642
2  llvm-mc         0x00000000006ffc94 llvm::sys::RunSignalHandlers() + 164
3  llvm-mc         0x0000000000705e8f
4  libpthread.so.0 0x00007f74a0e698d0
5  libc.so.6       0x00007f74a0039107 gsignal + 55
6  libc.so.6       0x00007f74a003a4e8 abort + 328
7  llvm-mc         0x00000000004e1756
8  llvm-mc         0x00000000004d2447
9  llvm-mc         0x00000000004d8e5f __sanitizer::Die() + 15
10 llvm-mc         0x00000000004d0adb
11 llvm-mc         0x00000000004d0621 __asan_report_error + 2897
12 llvm-mc         0x00000000004d12f7 __asan_report_load8 + 39
13 llvm-mc         0x000000000050eaa5
14 llvm-mc         0x000000000050e29f
15 llvm-mc         0x00000000005ebb1e
16 llvm-mc         0x00000000005d8143
17 llvm-mc         0x00000000004eeebb main + 23339
18 libc.so.6       0x00007f74a0025b45 __libc_start_main + 245
19 llvm-mc         0x00000000004e868a
Stack dump:
0.  Program arguments: build/bin/llvm-mc -show-inst-operands -triple riscv

(To build with ASan, I set the cmake variable LLVM_USE_SANITIZER to Address.)

function calls not working riscv-llvm

Hi everyone,

I am trying to compile a simple vector-vector add program using riscv-llvm compiler and run it on spike and I get the following error:

#include <stdio.h>                                                            
                                                                              
void __attribute__ ((noinline)) vvadd( int C[], int A[], int B[], int size )
{                                                                             
  for ( int i = 0; i < size; i++ ) {                                          
    C[i] = A[i] + B[i];                                                       
  }                                                                           
}                                                                             
                                                                                                                                                      
int main() {                                                                  
                                                                              
  int A[10] = { 1,2,3,4,5,6,7,8,9,10 };                                       
  int B[10] = { 1,2,3,4,5,6,7,8,9,10 };                                       
  int C[10];                                                                  
                                                                              
  vvadd(C, A, B, 10);                                                  
                                                                              
  for ( int i = 0; i < 10; i++ ) {                                            
    if ( C[i] != 2*(i+1) ) {                                                  
      printf("\n[FAILED]\n");                                                 
      return 0;                                                               
    }                                                                         
  }                                                                           
                                                                              
  printf("\n[PASSED]\n");                                                     
  return 0;                                                                   
                                                                              
}

When I compile it like this:

% clang -g -O3  -MMD -MP -I. -target riscv64 -mriscv=RV64IAMFD -S  vvadd.c
% riscv64-unknown-elf-gcc vvadd.s -o vvadd
% spike pk vvadd

I get the following error:

z  0000000000000000 ra 00000000000102e8 sp 000000007f7e9ac0 gp 0000000000015bf8
tp 0000000000000000 t0 0000000000000014 t1 0000000000000009 t2 0000000000000002
s0 000000007f7e9ac0 s1 0000000000000000 a0 0000000000000001 a1 0000000000000018
a2 000000007f7e9b18 a3 0000000000000000 a4 0000000000000010 a5 0000000000000002
a6 000000000000001f a7 0000000000000000 s2 0000000000000000 s3 0000000000000000
s4 0000000000000000 s5 0000000000000000 s6 0000000000000000 s7 0000000000000000
s8 0000000000000000 s9 0000000000000000 sA 0000000000000000 sB 0000000000000000
t3 0000000000000000 t4 0000000000000000 t5 0000000000000000 t6 0000000000000000
pc 0000000000010304 va 0000000000000014 insn       ffffffff sr 8000000200046020
User load segfault @ 0x0000000000000014

When instead I try to break the code in two files:

main.c

#include <stdio.h>                                                            
                                                                              
void vvadd( int C[], int A[], int B[], int size );                     
                                                                              
int main() {                                                                  
                                                                              
  int A[10] = { 1,2,3,4,5,6,7,8,9,10 };                                       
  int B[10] = { 1,2,3,4,5,6,7,8,9,10 };                                       
  int C[10];                                                                  
                                                                              
  vvadd(C, A, B, 10);                                                  
                                                                              
  for ( int i = 0; i < 10; i++ ) {                                            
    if ( C[i] != 2*(i+1) ) {                                                  
      printf("\n[FAILED]\n");                                                 
      return 0;                                                               
    }                                                                         
  }                                                                           
                                                                              
  printf("\n[PASSED]\n");                                                     
  return 0;                                                                   
                                                                              
}

vvadd.c

void vvadd( int C[], int A[], int B[], int size )                      
{                                                                             
  for ( int i = 0; i < size; i++ ) {                                          
    C[i] = A[i] + B[i];                                                       
  }                                                                           
}

and compile them using

% clang -g -O3  -MMD -MP -I. -target riscv64 -mriscv=RV64IAMFD -S  vvadd.c
% clang -g -O3  -MMD -MP -I. -target riscv64 -mriscv=RV64IAMFD -S  main.c
% riscv64-unknown-elf-gcc vvadd.s main.s -o vvadd
% spike pk vvadd

I get the following error:

z  0000000000000000 ra 00000000000102f8 sp 000000007f7e9ac0 gp 0000000000015c00
tp 0000000000000000 t0 000000000000000a t1 0000000000000009 t2 0000000000000000
s0 000000007f7e9ac0 s1 0000000000000000 a0 000000000000000a a1 000000007f7e9b18
a2 000000007f7e9af0 a3 000000000000000a a4 000000000000000a a5 0000000000000002
a6 000000000000001f a7 0000000000000000 s2 0000000000000000 s3 0000000000000000
s4 0000000000000000 s5 0000000000000000 s6 0000000000000000 s7 0000000000000000
s8 0000000000000000 s9 0000000000000000 sA 0000000000000000 sB 0000000000000000
t3 0000000000000000 t4 0000000000000000 t5 0000000000000000 t6 0000000000000000
pc 000000000001030c va 000000000000000a insn       ffffffff sr 8000000200046020
User load segfault @ 0x000000000000000a

I am using commit point e617c9c for riscv-llvm and 52e04ed for riscv-clang, commit 65cb174 for riscv-gnu-toolchain, 3a4e893 for riscv-isa-sim and 2dcae92 for riscv-pk ( basically riscv-trunk branch for both gnu tool chain and llvm ).

The program however works perfectly fine when there are no function call:

vvadd.c

int A[100];                                                                   
int B[100];                                                                   
int C[100];                                                                   
                                                                              
#include <stdio.h>                                                            
                                                                              
int main() {                                                                  
                                                                              
  for ( int i = 0; i < 100; i++ ) {                                           
    A[i] = i+1;                                                               
    B[i] = i+1;                                                               
  }                                                                           
                                                                                                                              
  for ( int i = 0; i < 100; i++ ) {                                           
    C[i] = A[i] + B[i];                                                       
  }                                                                           
                                                                              
  for ( int i = 0; i < 100; i++ ) {                                           
    if ( C[i] != 2*(i+1) ) {                                                  
      printf("\n[FAILED]\n");                                                 
      return 0;                                                               
    }                                                                         
  }                                                                           
                                                                              
  printf("\n[PASSED]\n");                                                     
  return 0;                                                                   
                                                                              
}

% clang -g -O3  -MMD -MP -I. -target riscv64 -mriscv=RV64IAMFD -S  vvadd.c
% riscv64-unknown-elf-gcc vvadd.s -o vvadd
% spike pk vvadd

[PASSED]

Does riscv-llvm support compile of libraries?

in README:

$ clang -target riscv64 -mriscv=RV64IAMFD -S hello.c -o hello.S
$ riscv64-unknown-elf-gcc -o hello.riscv hello.S

Which means the linking is in the riscv64-unknown-elf-gcc, and libraries is old ones in riscv-tools.
So how can I recompile libraries with clang?

hello.c compilation error

I am having this issue while compiling hello.c. I tried the solution mentioned in the other issue as well. Please see the compilation results below:

PS: I noticed that I did not have riscv-elf folder in my /opt/riscv folder which has all the the standard libraries. What is wrong with the installation. I followed the steps here: https://riscv.org/software-tools/low-level-virtual-machine-llvm/

Compilation Results:
% clang -target riscv64 -mriscv=RV64IAMFD -S hello.c -o hello.S

gives:
In file included from hello.c:1:
In file included from /usr/include/stdio.h:27:
/usr/include/features.h:367:12: fatal error: 'sys/cdefs.h' file not found
#include
^
1 error generated.

% clang -target riscv -mriscv=RV64IAMFD -nostdinc -I/opt/riscv/riscv-elf/include -I/opt/riscv/lib/clang/3.9.0/include -S hello.c -o hello.S

gives:
hello.c:1:10: fatal error: 'stdio.h' file not found
#include
^
1 error generated.

and
% clang -target riscv64 -mriscv=RV64IAMFD -nostdinc -I/opt/riscv/riscv-elf/include -I/opt/riscv/lib/clang/3.9.0/include -S hello.c -o hello.S

gives:
hello.c:1:10: fatal error: 'stdio.h' file not found
#include
^
1 error generated.

InsertBranch works incorrectly

In attached .ll file, the first conditional branch (icmp slt %0, 0) will be optimized away. Although it is absolutely neccessary. In my case this resulted in the fact, that my printf implmentation printed always '-' before each number, although it is positive.

Ok, so, what happened?

The current RISCV InsertBranch implementation checks for the current layout of the machine basic blocks. This is not allowed! The BranchFolding pass explicitly inserts a two-way branch before removing an empty block. So, the branch folder wants to reorganize the structure, and demands the insertion of branches, but we do not obey, so invalid code is generated.

riscv-llvm does not support inline ASM constraints "A" or "rK"

I have been running into the following complaints while attempting to use riscv-clang in a number of RISCV repositories:

"error: invalid output constraint '+A' in asm"
"error: invalid input constraint 'rK' in asm"

These constraints seem to be recognized and handled just fine by riscv-gcc. These constraints are used in both the riscv-linux project ( see https://github.com/riscv/riscv-linux/blob/riscv-next/arch/riscv/include/asm/bitops.h ) and in the riscv-musl project ( see https://github.com/lluixhi/musl-riscv/blob/master/arch/riscv64/atomic_a.h )

the target 'RISCV' does not exist

HI.
When Itry to build the project, I use cmake command. But it occurs error "the target 'RISCV' does not exist.
What should I do to resolve this.

LLVM build failed

When I build using Cmake, I get these erorrs:

% mkdir build
% cd build
% cmake -DCMAKE_INSTALL_PREFIX=/opt/riscv -DLLVM_TARGETS_TO_BUILD="RISCV" ../

CMake Error at CMakeLists.txt:143 (message):
The target `RISCV' does not exist.
It should be one of
AArch64;ARM;CppBackend;Hexagon;Mips;MBlaze;MSP430;NVPTX;PowerPC;Sparc;SystemZ;X86;XCore
-- Configuring incomplete, errors occurred!

fmadd.s/.d implementation

I take it from other comments in the issues list that pull requests aren't being reviewed/merged, so I'd like to present some changes that implement fmadd.s/.d code generation to any that are interested.

The code is available at
https://github.com/rtcw50/riscv-llvm (branch riscv-trunk on this fork)
https://github.com/rtcw50/riscv-clang(branch riscv-trunk on this fork)

The clang code makes -ffp-contract=on the default (it can be disabled either with #pragma FP_CONTRACT OFF or -ffp-contract=off). This allows the fma intrinsic to be generated by default, lowered to ISD:FMA, and subsequently codegen'd to fmadd.

A few tests added to test/CodeGen/RISCV to test the presence or absence of fmadd.

The target `RISCV' does not exist

CMake Error at CMakeLists.txt:143 (message):
The target `RISCV' does not exist.

  It should be one of

AArch64;ARM;CppBackend;Hexagon;Mips;MBlaze;MSP430;NVPTX;PowerPC;Sparc;SystemZ;X86;XCore

-- Configuring incomplete, errors occurred!
See also "/home/yu/riscv-llvm/build/CMakeFiles/CMakeOutput.log".
What should I do to resolve this？Thank you so much！

Assembling "j 0x10" fails with "error: instruction requires: ", Mask == 32

Hi,

I did the following:

$ echo 'j 0x10' | build1/bin/llvm-mc -triple riscv
<stdin>:1:1: error: instruction requires: (, 1<<5)
j 0x10
^
    .text

With the following (ugly) patch to help debugging:

diff --git a/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index cc198b1..2a390c8 100644
--- a/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -822,8 +822,11 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
     unsigned Mask = 1;
     for (unsigned I = 0; I < sizeof(ErrorInfo) * 8 - 1; ++I) {
       if (ErrorInfo & Mask) {
-        Msg += " ";
+        Msg += " (";
         Msg += getSubtargetFeatureName(ErrorInfo & Mask);
+        Msg += ", 1<<";
+        Msg += '0' + I;
+        Msg += ")";
       }
       Mask <<= 1;
     }

Somehow getSubtargetFeatureName(32); returns an empty string.

multiplication, i32, i64, muldi3, mulsi3

Hey all,
I am hoping, someone can point me out what I am doing wrong. I would like to compile the following program:

#include <stdlib.h>
int main(int argc, char** argv) {
short a = atoi(argv[1]);
short b = atoi(argv[2]);
return a * b;
}

I am trying to compile it and it results in
riscv64-unknown-linux-gnu-clang++ --sysroot=../../sysroot/ multiplier.cpp -S -o multiplier.S
riscv64-unknown-linux-gnu-g++ multiplier.S -o multiplier.riscv --static
/tmp/ccLOnAlk.o: In function 'main':
multiplier.cpp:(.text+0x68): undefined reference to '__mulsi3'
collect2: error: ld returned 1 exit status
Makefile:26: recipe for target 'multiplier.riscv' failed
make: *** [multiplier.riscv] Error 1

multiplier.S:
.text
.file "multiplier1.cpp"
.globl main
.p2align 2
.type main,@function
main:
addi x2, x2, -64
sd x1, 56(x2)
sd x8, 48(x2)
add x8, x2, x0
addiw x5, x10, 0
addi x10, x11, 0
sw x0, 44(x8)
sw x5, 40(x8)
sd x11, 32(x8)
ld x11, 8(x11)
lui x6, %hi(atoi)
addi x6, x6, %lo(atoi)
sd x10, 16(x8)
addi x10, x11, 0
sd x6, 8(x8)
jalr x1, x6, 0
sh x10, 30(x8)
ld x6, 32(x8)
ld x10, 16(x6)
ld x6, 8(x8)
jalr x1, x6, 0
sh x10, 28(x8)
lh x5, 30(x8)
lh x7, 28(x8)
addiw x10, x5, 0
addiw x11, x7, 0
jal x1, __mulsi3
add x2, x8, x0
ld x8, 48(x2)
ld x1, 56(x2)
addi x2, x2, 64
ret
Lfunc_end0:
.size main, Lfunc_end0-main

The issue here is the __mulsi3 call, which seems to be missing in the following riscv toolchain. If I change the type of a and b to long (anything with a word size that is larger than int) __mulsi3 is replaced by __muldi3, which is defined by the RISCV toolchain and consists of a software multiplication.

I am pretty sure I made a mistake and I forgot a flag somewhere telling clang to use a hardware multiplier (mul, mulw,...), but I have no idea, what the flag should look like (I am new to llvm and riscv). I saw in RISCVInstrInfoM.td that it requires "HasM" but I do not know, where to put it.

Thanks a lot in advance,
Alex

Anyone pushing to get RISCV in mainline llvm/clang?

I am trying to port the riscv stuff to the bitrig operating system. We have llvm/clang in our base system and it would make the porting effort much easier if riscv becomes part of the mainline llvm/clang distribution. By having this in base llvm/clang it prevents bitrot and divergent code bases.

Is someone working on doing this?

Is there any interest in doing this?

Infinite loop when compile spec with clang

I tried to compile SPEC2006 with https://github.com/ccelio/Speckle
When I compiled it, clang goes into infinite loop.
Below command is that I used to compile perl in SPEC2006.
Infinite loop is caused in RISCVBranchSelector.cpp

clang -S -target riscv -mriscv=RV64IAMFD -I/lib/gcc/riscv64-unknown-linux-gnu/5.2.0//include -I/lib/gcc/riscv64-unknown-linux-gnu/5.2.0//include-fixed -I/lib/gcc/riscv64-unknown-linux-gnu/5.2.0//../../../../riscv64-unknown-linux-gnu/include -I/sysroot/usr/include -static -std=gnu89 -Wl,-Ttext-segment,0x10000 -DSPEC_CPU -DNDEBUG -DPERL_CORE -fno-strict-aliasing -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 -o regexec.S regexec.c -O0

ld error when building esp-llvm as a release build

when building esp-llvm using gcc with build type release (branch: trunk), the ld would fail building target libLTO.so due to RISCVVectorFetchOptimizer refer to undefined symbol llvm::Metadata::dump() const in RISCVVectorFetchIROpt::processOpenCLKernel.
But the bug won't appear when building a debug release.

the log:

[ 76%] Linking CXX shared library ../../lib/libLTO.so
/usr/bin/ld: ../../lib/libLLVMRISCVCodeGen.a(RISCVVectorFetchOptimizer.cpp.o): in function (anonymous namespace)::RISCVVectorFetchIROpt::processOpenCLKernel(llvm::Function*)': RISCVVectorFetchOptimizer.cpp:(.text._ZN12_GLOBAL__N_121RISCVVectorFetchIROpt19processOpenCLKernelEPN4llvm8FunctionE+0xda9): undefined reference to llvm::Metadata::dump() const'
collect2: error: ld returned 1 exit status
make[2]: *** [tools/lto/CMakeFiles/LTO.dir/build.make:146: lib/libLTO.so.9svn] Error 1
make[1]: *** [CMakeFiles/Makefile2:11926: tools/lto/CMakeFiles/LTO.dir/all] Error 2
make: *** [Makefile:152: all] Error 2

Failure trying to build GNU coreutils with Clang

I'm trying to build GNU coreutils, the wc utility in particular, and I'm seeing the exception below. The code raising it is in RegAllocFast.cpp:361:

  switch (PhysRegState[PhysReg]) {
  case regDisabled:
    break;
  case regReserved:
    PhysRegState[PhysReg] = regFree;
    // Fall through
  case regFree:
    MO.setIsKill();
    return;
  default:
    // The physreg was allocated to a virtual register. That means the value we
    // wanted has been clobbered.
    llvm_unreachable("Instruction uses an allocated register");
  }

The trace is:

johnw@ubuntu:~/coreutils-8.24$ make src/wc
  CC       lib/open-safer.o
Instruction uses an allocated register
UNREACHABLE executed at /home/johnw/riscv-llvm/lib/CodeGen/RegAllocFast.cpp:361!
#0 0x3d4f39e llvm::sys::PrintStackTrace(llvm::raw_ostream&) /home/johnw/riscv-llvm/lib/Support/Unix/Signals.inc:405:0
#1 0x3d4f6b3 PrintStackTraceSignalHandler(void*) /home/johnw/riscv-llvm/lib/Support/Unix/Signals.inc:463:0
#2 0x3d4dde6 llvm::sys::RunSignalHandlers() /home/johnw/riscv-llvm/lib/Support/Signals.cpp:34:0
#3 0x3d4e2be SignalHandler(int) /home/johnw/riscv-llvm/lib/Support/Unix/Signals.inc:211:0
#4 0x2aedbaaa3340 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x10340)
#5 0x2aedbb70bcc9 gsignal (/lib/x86_64-linux-gnu/libc.so.6+0x36cc9)
#6 0x2aedbb70f0d8 abort (/lib/x86_64-linux-gnu/libc.so.6+0x3a0d8)
#7 0x3d334e5 bindingsErrorHandler(void*, std::string const&, bool) /home/johnw/riscv-llvm/lib/Support/ErrorHandling.cpp:126:0
#8 0x332c36a (anonymous namespace)::RAFast::usePhysReg(llvm::MachineOperand&) /home/johnw/riscv-llvm/lib/CodeGen/RegAllocFast.cpp:351:0
#9 0x332f428 (anonymous namespace)::RAFast::AllocateBasicBlock() /home/johnw/riscv-llvm/lib/CodeGen/RegAllocFast.cpp:945:0
#10 0x333001e (anonymous namespace)::RAFast::runOnMachineFunction(llvm::MachineFunction&) /home/johnw/riscv-llvm/lib/CodeGen/RegAllocFast.cpp:1092:0
#11 0x32da0c7 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /home/johnw/riscv-llvm/lib/CodeGen/MachineFunctionPass.cpp:41:0
#12 0x3c34baa llvm::FPPassManager::runOnFunction(llvm::Function&) /home/johnw/riscv-llvm/lib/IR/LegacyPassManager.cpp:1520:0
#13 0x3c34d27 llvm::FPPassManager::runOnModule(llvm::Module&) /home/johnw/riscv-llvm/lib/IR/LegacyPassManager.cpp:1540:0
#14 0x3c3507d (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) /home/johnw/riscv-llvm/lib/IR/LegacyPassManager.cpp:1596:0
#15 0x3c3575b llvm::legacy::PassManagerImpl::run(llvm::Module&) /home/johnw/riscv-llvm/lib/IR/LegacyPassManager.cpp:1698:0
#16 0x3c35995 llvm::legacy::PassManager::run(llvm::Module&) /home/johnw/riscv-llvm/lib/IR/LegacyPassManager.cpp:1730:0
#17 0x15913d2 (anonymous namespace)::EmitAssemblyHelper::EmitAssembly(clang::BackendAction, llvm::raw_pwrite_stream*) /home/johnw/riscv-llvm/tools/clang/lib/CodeGen/BackendUtil.cpp:657:0
#18 0x159149c clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::CodeGenOptions const&, clang::TargetOptions const&, clang::LangOptions const&, llvm::StringRef, llvm::Module*, clang::BackendAction, llvm::raw_pwrite_stream*) /home/johnw/riscv-llvm/tools/clang/lib/CodeGen/BackendUtil.cpp:673:0
#19 0x156f5e2 clang::BackendConsumer::HandleTranslationUnit(clang::ASTContext&) /home/johnw/riscv-llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp:186:0
#20 0x1892086 clang::ParseAST(clang::Sema&, bool, bool) /home/johnw/riscv-llvm/tools/clang/lib/Parse/ParseAST.cpp:170:0
#21 0x124b3ee clang::ASTFrontendAction::ExecuteAction() /home/johnw/riscv-llvm/tools/clang/lib/Frontend/FrontendAction.cpp:540:0
#22 0x1571dc0 clang::CodeGenAction::ExecuteAction() /home/johnw/riscv-llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp:788:0
#23 0x124aeb1 clang::FrontendAction::Execute() /home/johnw/riscv-llvm/tools/clang/lib/Frontend/FrontendAction.cpp:443:0
#24 0x12094c6 clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) /home/johnw/riscv-llvm/tools/clang/lib/Frontend/CompilerInstance.cpp:822:0
#25 0x11c962b clang::ExecuteCompilerInvocation(clang::CompilerInstance*) /home/johnw/riscv-llvm/tools/clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp:222:0
#26 0x11b0bba cc1_main(llvm::ArrayRef<char const*>, char const*, void*) /home/johnw/riscv-llvm/tools/clang/tools/driver/cc1_main.cpp:116:0
#27 0x11c2b74 ExecuteCC1Tool(llvm::ArrayRef<char const*>, llvm::StringRef) /home/johnw/riscv-llvm/tools/clang/tools/driver/driver.cpp:380:0
#28 0x11c32cc main /home/johnw/riscv-llvm/tools/clang/tools/driver/driver.cpp:443:0
#29 0x2aedbb6f6ec5 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x21ec5)
#30 0x11aee59 _start (/opt/riscv/bin/clang+0x11aee59)
Stack dump:
0.      Program arguments: /opt/riscv/bin/clang -cc1 -triple riscv64-unknown--elf -S -disable-free -main-file-name open-safer.c -mrelocation-model static -mthread-model posix -mdisable-fp-elim -fmath-errno -no-integrated-as -mconstructor-aliases -target-feature +rv64 -target-feature +a -target-feature +m -target-feature +f -target-feature +d -target-linker-version 2.24 -dwarf-column-info -coverage-file /home/johnw/coreutils-8.24/open-safer.c -resource-dir /opt/riscv/bin/../lib/clang/3.8.0 -I . -I ./lib -I lib -I ./lib -I src -I ./src -I /opt/riscv/riscv64-unknown-elf/include -fno-dwarf-directory-asm -fdebug-compilation-dir /home/johnw/coreutils-8.24 -ferror-limit 19 -fmessage-length 100 -mstackrealign -fobjc-runtime=gcc -fdiagnostics-show-option -o /tmp/open-safer-eea432.s -x c lib/open-safer.c
1.      <eof> parser at end of file
2.      Code generation
3.      Running pass 'Function Pass Manager' on module 'lib/open-safer.c'.
4.      Running pass 'Fast Register Allocator' on function '@open_safer'
clang: error: unable to execute command: Aborted (core dumped)
clang: error: clang frontend command failed due to signal (use -v to see invocation)
clang version 3.8.0
Target: riscv64-unknown--elf
Thread model: posix
InstalledDir: /opt/riscv/bin
clang: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
clang: note: diagnostic msg:
********************

PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
Preprocessed source(s) and associated run script(s) are located at:
clang: note: diagnostic msg: /tmp/open-safer-e9100b.c
clang: note: diagnostic msg: /tmp/open-safer-e9100b.sh
clang: note: diagnostic msg:

********************
make: *** [lib/open-safer.o] Error 254

Upstream RISC-V changes to allow for a Rust-lang port

I just opened a ticket on the Rust-lang repository regarding a RISC-V port and was informed that we need to upstream the changes in this repository in order to be able to compile Rust without any issues.

Please let me know if and when this can be done. Thank you!

Assertion failure: "Couldn't find the register class"

The following LLVM IR doesn't compile to RISC-V assembly, due to an assertion failure:

target datalayout = "e-m:e-p:32:32:32-i1:8:16-i8:8:16-i16:16-i32:32-f32:32-f64:64-f80:128-f128:128-n32"
target triple = "riscv--linux-elf"

%bar = type { i8 }

define void @foo(%bar*, { i32, i8* }, { i32, i8* }, { i32, i8* }, i32, i32) #0 {
  %7 = alloca %bar*, align 4
  %8 = alloca { i32, i8* }, align 4
  %9 = alloca { i32, i8* }, align 4
  %10 = alloca { i32, i8* }, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store %bar* %0, %bar** %7
  store { i32, i8* } %1, { i32, i8* }* %8
  store { i32, i8* } %2, { i32, i8* }* %9
  store { i32, i8* } %3, { i32, i8* }* %10
  store i32 %4, i32* %11
  store i32 %5, i32* %12
  ret void
}

$ clang -target riscv-linux-elf -mriscv=RV32 -S test.ll
Assertion failed: (BestRC && "Couldn't find the register class"), function getMinimalPhysRegClass, file riscv-llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 141.
Stack dump:
0.	Program arguments: /opt/riscv/bin/clang-3.9 -cc1 -triple riscv--linux-elf -S -disable-free -main-file-name test.ll -mrelocation-model static -mthread-model posix -mdisable-fp-elim -fmath-errno -no-integrated-as -mconstructor-aliases -target-feature +rv32 -target-feature -rv64 -target-linker-version 274.1 -dwarf-column-info -debugger-tuning=gdb -coverage-file test.ll -resource-dir /opt/riscv/bin/../lib/clang/3.9.0 -fno-dwarf-directory-asm -fdebug-compilation-dir . -ferror-limit 19 -fmessage-length 165 -fobjc-runtime=gcc -fdiagnostics-show-option -fcolor-diagnostics -o test.s -x ir test.ll 
1.	Code generation
2.	Running pass 'Function Pass Manager' on module 'test.ll'.
3.	Running pass 'Prologue/Epilogue Insertion & Frame Finalization' on function '@foo'

The same error still happens when we simplify the auto generated clang/llvm call to:

/opt/riscv/bin/clang-3.9 -cc1 -triple riscv--linux-elf -S -main-file-name test.ll -o test.s -x ir test.ll

This IR is a slight simplification of the IR generated by a C-like LLVM frontend, built with this LLVM fork, branch riscv-trunk (latest commit, cd5b77c). If a fix cannot be provided in a timely fashion, workarounds would be appreciated too.

Build fails immediately

Hi, I tried to follow the instructions in the readme, and I got the frollowing error:

joel:/nfs/scratch/joel 
 $ git clone -b RISCV https://github.com/riscv/riscv-llvm.git
Cloning into 'riscv-llvm'...
remote: Counting objects: 1057149, done.
remote: Total 1057149 (delta 0), reused 0 (delta 0), pack-reused 1057149
Receiving objects: 100% (1057149/1057149), 206.89 MiB | 1.41 MiB/s, done.
Resolving deltas: 100% (866268/866268), done.
Checking connectivity... done.
Checking out files: 100% (11855/11855), done.
joel:/nfs/scratch/joel 
 $ cd riscv-llvm/
joel:/nfs/scratch/joel/riscv-llvm (RISCV)
 $ git submodule update --init --recursive 
Submodule 'riscv-clang' (https://github.com/riscv/riscv-clang.git) registered for path 'riscv-clang'
Cloning into 'riscv-clang'...
remote: Counting objects: 543424, done.
remote: Total 543424 (delta 0), reused 0 (delta 0), pack-reused 543424
Receiving objects: 100% (543424/543424), 102.46 MiB | 1.52 MiB/s, done.
Resolving deltas: 100% (456062/456062), done.
Checking connectivity... done.
Submodule path 'riscv-clang': checked out '5ca597d912b945857b457674db7ca80370eb9a7c'
joel:/nfs/scratch/joel/riscv-llvm (RISCV)
 $ mkdir build
joel:/nfs/scratch/joel/riscv-llvm (RISCV)
 $ cd build
joel:/nfs/scratch/joel/riscv-llvm/build (RISCV)
 $ cmake -DCMAKE_INSTALL_PREFIX=/nfs/scratch/joel/riscv-llvm/install -DLLVM_TARGETS_TO_BUILD="RISCV" ../
-- The C compiler identification is GNU 4.8.4
-- The CXX compiler identification is GNU 4.8.4
-- Check for working C compiler: /usr/bin/cc
-- Check for working C compiler: /usr/bin/cc -- works
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Detecting C compile features
-- Detecting C compile features - done
-- Check for working CXX compiler: /usr/bin/c++
-- Check for working CXX compiler: /usr/bin/c++ -- works
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Error at CMakeLists.txt:143 (message):
  The target `RISCV' does not exist.

      It should be one of


  AArch64;ARM;CppBackend;Hexagon;Mips;MBlaze;MSP430;NVPTX;PowerPC;Sparc;SystemZ;X86;XCore


-- Configuring incomplete, errors occurred!
See also "/nfs/scratch/joel/riscv-llvm/build/CMakeFiles/CMakeOutput.log".

Calling Convention not respected

Hi! I think there is a problem in riscv-trunk when compiled with -O1 option. I attached an example in c and the generated assembly.

I compile with:

/.../clang -O1 -target riscv -mriscv=RV32I test.c -S -o test.S
/.../riscv32-unknown-elf-gcc test.S -o test.o

I think that the last jalr (line 42) jumps to a wrong address.

test.zip

Simple way to enable output of "call" pseudo instruction?

Hello, I am writing an emulator for RISCV using RISCV assembly as an input. I have this working for the GCC assembly output. I like to switch to using LLVM to generate the assembly as working with LLVM is much easier when it comes time to manipulate programs; however I've hit a couple snags.

The last major obstacle I have in switching to LLVM is that it currently generates lui/addi/jalr triples in the assembly rather than the call pseudo instruction. I'm not very familiar with LLVM Machine passes and am having some trouble in switching from the triples to the pseudo op. I've traced things through to the emitCALL function in RISCVISelLowering; however, at by this point the machine IR has already converted to the LLVM IR call into instructions to load the address of the function and then CALLREG64. It seems like I need to go up one more level to where the LLVM IR is converted in this machine IR, but I'm not entirely certain where that happens.

If anyone knows of a simple way to enable this functionality, or can point me in the right direction on how to implement it or figure out where the LLVM IR is initially converted to RISCV Machine IR I would be very grateful.

Thank you!

CMAKE build support for riscv-llvm

Building riscv-llvm using cmake does not automatically detect support for riscv as a target. Please update cmake configuration to add in build support for riscv-llvm.