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gemx's Introduction

General Matrix Operation

This README file contains the following sections:

  1. OVERVIEW
  2. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS
  3. DESIGN FILE HIERARCHY
  4. BUILD GEMX-BASED EXAMPLE APPLICATIONS
  5. SUPPORT
  6. LICENSE AND CONTRIBUTING TO THE REPOSITORY
  7. ACKNOWLEDGEMENTS
  8. REVISION HISTORY

1. OVERVIEW

GEMX is a General Matrix Operation library, which is used for accelerating BLAS-like matrix operations on SDAccel supported FPGA cards. This library includes three components: an engine library, a host code compiler and an application or system building environment. The engine library consists of a set of C++ templates with BLAS-like function interfaces for realizing matrix operations on FPGAs. The host code compiler compiles the host code matrix function calls into a sequence of instructions for triggering matrix operations on FPGAs. The building environment utilizes GNU make flow to automate the FPGA and host code image generation process. It also allows users to configure different aspects of the system, e.g. FPGA platform, number of engines implemented in the FPGA image and etc. For detailed information about GEMX engine design, please refer to GEMX_ENGINE_UG

2. SOFTWARE AND SYSTEM REQUIREMENTS

Board DSA Name Software Version
Xilinx VU9P xilinx:vcu1525:dynamic:5_1 SDx 2018.2
Xilinx ALVEO xilinx:u200:xdma:201830_2 SDx 2019.1

3. DESIGN FILE HIERARCHY

Source code for building FPGA and host code images is located in the gemx/src directory. gemx/Makefile is used to build FPGA and host images with different configurations. gemx/hls_config.tcl is used to configure the hls compilation options. gemx/run-hls.tcl is used to create vivado_hls project from cpu emulation results. gemx/MLsuite_MLP provides Python bindings for GEMX engines. Those python bindings allow users to offload Python-based Matrix operations to GEMX engines.

4. Running GEMX Python APIs on Nimbix Cloud

To run the GEMX Python APIs on Nimbix Cloud, please follow the steps below:

  • run
git clone https://github.com/Xilinx/gemx

to clone the master branch of this repository

  • follow the user guide SDx On Nimbix to login to your Nimbix account
  • launch application "Xilinx SDAccel Development & Alveo FPGA 2018.3" and select "Desktop Mode with FPGA"
  • choose machine type "16 core, 128 GB RAM, Xilinx Alveo U200 FPGA (nx5u_xdma_201830_1)"
  • copy the gemx/MLsuite_MLP directory to the Nimbix machine, and navigate to the MLsuite_MLP directory
  • following GEMX Python APIs to setup Python environment on the Nimbix machine and run GEMX Python APIs.

Important update:

  • .xclbin and config_info.dat files with FP32 type FCN engine has been added to the repository
  • the .xclbin and config_info.dat file can be found in gemx/MLsuite_MLP/xclbins/u200_201830_2
  • to run them on Nimbix, pleaselaunch application "Xilinx SDAccel Development 2019.1" and select "Desktop Mode with FPGA"
  • choose machine type "16 core, 128 GB RAM, Xilinx Alveo U200 FPGA (nx5u_xdma_201830_2)"
  • following GEMX Python APIs to setup Python environment on the Nimbix machine and run GEMX Python APIs.

5.BUILD GEMX-BASED EXAMPLE APPLICATIONS

A set of make commands are used in the verify.sh to demonstrate the GEMX engine usage with xilinx:u200:xdma:201830_2 DSA. Before compiling and building FPGA and host images, make sure SDAccel 2019.1 envioronment variales are set up properly and navigate to gemx/ directory, and enter command:

./verify.sh

enter one of the build process names (sw_em, hw_em or hw) and one of the four engine names (gemm, spmv or fcn) when the command line prompts for input. File gemx/set_env.sh provides an example about how to set up SDAccel 2019.1 environment variables.

6. SUPPORT

For more information about SDAccel check the SDAccel User Guides

For questions and to get help on this project or your own projects, visit the SDAccel Forums.

7. LICENSE AND CONTRIBUTING TO THE REPOSITORY

The source for this project is licensed under the Apache 2.0 license

To contribute to this project, follow the guidelines in the Repository Contribution README

8. ACKNOWLEDGEMENTS

This example is written by developers at

9. REVISION HISTORY

Date README Version Description
Oct2017 1.0 Initial Xilinx Release
Mar2018 2.0 Updated to SDx 2017.4
Sep2018 2.1 Updated to SDx 2018.2
May2019 2.2 Updated to SDx 2019.1
Oct2019 2.3 Added .xclbin with FP32 FCN engine

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gemx's Issues

Why Multi_Instruction API doesn't support fp32?

It seems that GEMM engine supports fp32 according to the docs. However, the multi instruction API doc states that fp32 is not supported. Is this an AWS specific issue? Can I use multi instruction on Alevo U200?

Issues running with SDAccel 2018.3

I am experiencing issues trying to run GEMX 2018.2 with SDAccel 2018.3. I had to fix some paths in the makefile and was able to build a HW implementation that runs successfully. However I am not able to run ./run_app.sh gemx_func_test. It terminates with this:

***** Compile testcase generator executable *****
/apps/tools/FPGA/Xilinx/Vivado/2018.3/tps/lnx64/gcc-6.2.0/bin/g++ -g -O0 -std=c++11 -I /home/common/ven_veremin/SDx/gemx-2018.2/gemx_sw/../boost/ -DCL_USE_DEPRECATED_OPENCL_1_1_APIS -DBOOST_COMPUTE_DEBUG_KERNEL_COMPILATION -DBOOST_COMPUTE_HAVE_THREAD_LOCAL -DBOOST_COMPUTE_THREAD_SAFE -D FLOW_HLS_CSIM -D GMEM_M=0  -I ./src -I ./src/python -D TEST_SDX=1 -D GEMX_dataType=short -D GEMX_XdataType=int32_t  -D GEMX_dataEqIntType=short -D GEMX_ddrWidth=32  -D GEMX_XddrWidth=16  -D GEMX_argInstrWidth=1 -D GEMX_numInstr=16 -D GEMX_gemvkVectorBlocks=512 -D GEMX_gemvmVectorBlocks=512 -D GEMX_gemvmGroups=1 -D GEMX_gemmMBlocks=1  -D GEMX_gemmKBlocks=2 -D GEMX_gemmNBlocks=1 -D GEMX_keepMacBits=1 -D GEMX_macBits=48 -D GEMX_transpBlocks=1 -D GEMX_spmvWidth=8  -D GEMX_spmvkVectorBlocks=2048 -D GEMX_spmvMacGroups=12  -D GEMX_spmvColAddIdxBits=2 -D GEMX_spmvPadA=0 -D GEMX_spmvNumCblocks=1024 -D GEMX_spmvFloatPerDesc=2  -D GEMX_idxType=int32_t -D GEMX_nnzBlocks=8 -D GEMX_spmvKmaxBlocks=32768  -D GEMX_spmvMmaxBlocks=5462  -D GEMX_spmvUramGroups=6  -D GEMX_argPipeline=2 -D GEMX_part=vcu1525 -D GEMX_useURAM=0 -D GEMX_splitMesh=1 -D GEMX_runGemv=1 -D GEMX_runGemm=1 -D GEMX_runTransp=1 -D GEMX_runSpmv=1 -D GEMX_numKernels=1 -Wno-ignored-attributes  -D HLS_NO_XIL_FPO_LIB=1 -I/opt/xilinx/xrt//Vivado_HLS/include -I/apps/tools/FPGA/Xilinx/Vivado/2018.3/include -I/opt/xilinx/xrt//runtime/include/1_2 -I/opt/xilinx/xrt//include -I/opt/xilinx/xrt//include/CL  -D GEMX_fpgaDdrBanks=XCL_MEM_DDR_BANK0,XCL_MEM_DDR_BANK3,XCL_MEM_DDR_BANK1,XCL_MEM_DDR_BANK2 -L/home/common/ven_veremin/SDx/gemx-2018.2/gemx_sw/../boost/libs -lboost_iostreams -lz -L/apps/tools/FPGA/Xilinx/Vivado/2018.3/tps/lnx64/gcc-6.2.0/lib64 -lxilinxopencl -L/opt/xilinx/xrt//runtime/lib/x86_64 -L/opt/xilinx/xrt//lib -lstdc++ -L/apps/tools/FPGA/Xilinx/Vivado/2018.3/tps/lnx64/gcc-6.2.0/lib64 -lrt -pthread -Wl,--rpath=/opt/xilinx/xrt//runtime/lib/x86_64 -Wl,--rpath=/home/common/ven_veremin/SDx/gemx-2018.2/gemx_sw/../boost/libs -Wl,--rpath=/apps/tools/FPGA/Xilinx/Vivado/2018.3/tps/lnx64/gcc-6.2.0/lib64  -fdata-sections -ffunction-sections -Wl,--gc-sections src/gemx_gen_bin.cpp -o out_host/gemx_gen_bin.exe
out_host/gemx_gen_bin.exe -write out_host/app.bin gemm 256 256 256  256 256 256 256 1 0 A1 B1 C1 X1 gemv 256 256 288 A2 B2 C2 spmv 96 128 256 none A3 B3 C3 transp 32 32 64 96 rm cm A4 B4
GEMX:  out_host/gemx_gen_bin.exe -write out_host/app.bin
Added GEMM 256x256x256
Added GEMV 256x256
gemx_gen_bin.exe: src/gemx_gen_bin.h:357: SpMat<Tddr, TmatD, Tmat>::SpMat(unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, Tddr*) [with Tddr = short int; TmatD = gemx::SpmvAd<short int, 16, 2, 8>; Tmat = gemx::SpmvA<short int, 16, 2, 8>]: Assertion `sizeof(Tddr) * SpmvType::getDdrWidth() == sizeof(TmatD) * SpmvType::getSpmvWidth()' failed.
make: *** [out_host/app_gold.txt] Aborted

or
./verify.sh
hw_em
gemm
finishes simulation with this:

  Compared 1048576 values:  exact match 1044480  within tolerance 4  mismatch 4092
Gemm C Differs
###########  Op Gemm  ###########
  C = postScale(A * B + X) 1024x1024 = 1024x1024 * 1024x1024 + 1024 x 1024
  Comparing ...
      row 15 col 15  ValRef -21786      Val 12633        DifRel 1.57987     DifAbs 34419        Status 0
      row 15 col 31  ValRef -19158      Val 12546        DifRel 1.65487     DifAbs 31704        Status 0
...
      row 1023 col 991  ValRef 18528       Val 21531        DifRel 0.162079    DifAbs 3003         Status 0
      row 1023 col 1007  ValRef 21462       Val 20156        DifRel 0.0608517   DifAbs 1306         Status 0
      row 1023 col 1023  ValRef 16656       Val 19942        DifRel 0.197286    DifAbs 3286         Status 0
  Compared 1048576 values:  exact match 1044480  within tolerance 1  mismatch 4095
Gemm C Differs
make[2]: *** [check] Error 1
make[2]: Leaving directory `/home/common/ven_veremin/SDx/gemx-2018.2/gemx_'
make[1]: *** [run_em_int] Error 2
rm out_hw_emu/k0dirmake[1]: unlink: out_hw_emu/k0dir: Is a directory

Are you going to update the library to 2018.3?

xblas_gemv implementation

Hello,

I am trying to implement the xblas_gemv similar to xblas_gemm and use it to accelerate a genomics tool. And was hoping to get the code changes reviewed as the test is not working as expected.

Here is the related code changes in my clone.

  1. XBLAS_GEMV Implementation: ramcn/gemxx-2017@6295836
  2. XBLAS_GEMV Test case: ramcn/gemxx-2017@899b54a

When I run the test case gemv_xblas_main.cpp, the resultant matrix C is all zeroes and I am unable to figure out what the issue is. It will be great if the gemx developers can spot anything obviously wrong with the above implementation.

Thank you,
Ram

Problem with compiling Gemx

Hello,

I try to compile Gemx for an Xilinx_adm-pcie-7v3_1ddr_2_1. However, the compilation ends up with the following error:

$ make run_hw SDA_FLOW=hw GEMX_ddrWidth=32 GEMX_gemmMBlocks=8 GEMX_gemmKBlocks=8 GEMX_gemmNBlocks=8 GEMX_numKernels=4 GEMX_runGemv=0 GEMX_runTransp=0 GEMX_runGemm=1 GEMX_part=vu9pf1 GEMX_kernelHlsFreq=250 GEMX_kernelVivadoFreq=300 GEMX_useURAM=1 GEMX_vivadoFlow=EXP

make: *** No rule to make target `run_hw'. Stop.

The environment variables are set up before compilation as follows:

$ source /opt/Xilinx/SDAccel/2016.2/settings64.sh
$ export LD_LIBRARY_PATH=/opt/Xilinx/SDAccel/2016.2/runtime/lib/x86_64:$LD_LIBRARY_PATH

It is my pleasure if someone could help me to solve the error.

Regards,
Hamidreza

Measure the time of each step

Hi, I want to use the gemx program to compute matrix multiplication in FPGA .
Here I want to know how to measure the execution time of these steps included:
1)read data from DDR to FPGA
2)compute matrix multiplication
3)write results from FPGA to DDR
which command should I use ?

Problem compiling Gemx

Hello,

I am trying to compile gemx on a C4.4xlarge instance running the FPGA developer AMI.

When I try to run the provided run_app.sh, I get this error:

src/gemx_fpga.h: In member function ‘bool gemx::Fpga::createBuffers(gemx::MemDesc*)’:
<command-line>:0:19: error: ‘XCL_MEM_DDR_BANK0’ was not declared in this scope
src/gemx_fpga.h:127:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
<command-line>:0:37: error: ‘XCL_MEM_DDR_BANK1’ was not declared in this scope
src/gemx_fpga.h:127:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
<command-line>:0:55: error: ‘XCL_MEM_DDR_BANK2’ was not declared in this scope
src/gemx_fpga.h:127:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
<command-line>:0:73: error: ‘XCL_MEM_DDR_BANK3’ was not declared in this scope
src/gemx_fpga.h:127:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
In file included from src/gemx_api_gemm.cpp:59:0:
src/gemx_fpga.h:129:9: error: ‘cl_mem_ext_ptr_t’ was not declared in this scope
         cl_mem_ext_ptr_t l_bufExt;
         ^~~~~~~~~~~~~~~~
src/gemx_fpga.h:131:9: error: ‘l_bufExt’ was not declared in this scope
         l_bufExt.param = 0;
         ^~~~~~~~
src/gemx_fpga.h:138:65: error: ‘CL_MEM_EXT_PTR_XILINX’ was not declared in this scope
                       CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE | CL_MEM_EXT_PTR_XILINX,
                                                                 ^~~~~~~~~~~~~~~~~~~~~
src/gemx_fpga.h: In member function ‘bool gemx::Fpga::copyToFpgaWithoutEvent(gemx::MemDesc&)’:
<command-line>:0:19: error: ‘XCL_MEM_DDR_BANK0’ was not declared in this scope
src/gemx_fpga.h:239:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
<command-line>:0:37: error: ‘XCL_MEM_DDR_BANK1’ was not declared in this scope
src/gemx_fpga.h:239:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
<command-line>:0:55: error: ‘XCL_MEM_DDR_BANK2’ was not declared in this scope
src/gemx_fpga.h:239:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
<command-line>:0:73: error: ‘XCL_MEM_DDR_BANK3’ was not declared in this scope
src/gemx_fpga.h:239:32: note: in expansion of macro ‘GEMX_fpgaDdrBanks’
         unsigned l_k2bank[] = {GEMX_fpgaDdrBanks};
                                ^
In file included from src/gemx_api_gemm.cpp:59:0:
src/gemx_fpga.h:241:9: error: ‘cl_mem_ext_ptr_t’ was not declared in this scope
         cl_mem_ext_ptr_t l_bufExt;
         ^~~~~~~~~~~~~~~~
src/gemx_fpga.h:242:9: error: ‘l_bufExt’ was not declared in this scope
         l_bufExt.obj = NULL;
         ^~~~~~~~
src/gemx_fpga.h:250:27: error: ‘CL_MEM_EXT_PTR_XILINX’ was not declared in this scope
       CL_MEM_READ_WRITE | CL_MEM_EXT_PTR_XILINX,
                           ^~~~~~~~~~~~~~~~~~~~~
make: *** [out_host/gemx_api_gemm.exe] Error 1

It would be great if anyone had guidance on how to solve this error.

Thanks,
Alex

how to use gemx library

Can anyone tell me the proper instructions to use this GEMX library. Mainly how to use the matrix multiplication function with the source code given. Please provide the necessary steps to compile and run the source code along with the necessary platform.

Error: Missing DSA or platform repo. Stop.

when I try to compile the gemm project, the following error happens:
/tmp/cc8fJfho.s: Assembler messages:
/tmp/cc8fJfho.s:318: Error: expecting string instruction after rep' /tmp/cc8fJfho.s:386: Error: expecting string instruction after rep'
/tmp/cc8fJfho.s:6845: Error: expecting string instruction after rep' /tmp/cc8fJfho.s:16931: Error: expecting string instruction after rep'
/tmp/cc8fJfho.s:21658: Error: expecting string instruction after `rep'
make: *** [out_host/gemx_host.exe] Error 1

multiple definition of `kernelOpLow'

I build the hw failed. So I tried cpu_emu.
make run_cpu_em SDA_FLOW=sw_em GEMX_ddrWidth=32 GEMX_argInstrWide=1 GEMX_gemmMBlocks=8 GEMX_gemmKBlocks=8 GEMX_gemmNBlocks=8 GEMX_numKernels=4 GEMX_runGemv=0 GEMX_runTransp=0 GEMX_runGemm=1 GEMX_part=ku115 GEMX_kernelHlsFreq=250 GEMX_kernelVivadoFreq=300 GEMX_useURAM=1 GEMX_vivadoFlow=EXP XILINX_SDX=/opt/Xilinx/SDx/2017.2

And here is the error info in linking.

****** xocc v2017.2_sdx (64-bit)
**** SW Build 1972098 on Wed Aug 23 11:34:38 MDT 2017
** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

INFO: [XOCC 60-629] Linking for software emulation target
INFO: [XOCC 60-895] Target platform: /opt/Xilinx/SDx/2017.2/platforms/xilinx_xil-accel-rd-ku115_4ddr-xpr_4_0/xilinx_xil-accel-rd-ku115_4ddr-xpr_4_0.xpfm
INFO: [XOCC 60-423] Target device: xilinx:xil-accel-rd-ku115:4ddr-xpr:4.0
WARNING: [XOCC 60-889] User-specified kernel frequency for ID 0 is the same as the default frequency 300 MHz, so it will be ignored
INFO: [XOCC 60-694] Validating user connections (map_connect)...
INFO: [XOCC 60-690] User connection 'kernel|gemxKernel_0|M_AXI_GMEMM' is valid
INFO: [XOCC 60-690] User connection 'core|OCL_REGION_0|M00_AXI' is valid
INFO: [XOCC 60-690] User connection 'kernel|gemxKernel_1|M_AXI_GMEMM' is valid
INFO: [XOCC 60-690] User connection 'core|OCL_REGION_0|M01_AXI' is valid
INFO: [XOCC 60-690] User connection 'kernel|gemxKernel_2|M_AXI_GMEMM' is valid
INFO: [XOCC 60-690] User connection 'core|OCL_REGION_0|M02_AXI' is valid
INFO: [XOCC 60-690] User connection 'kernel|gemxKernel_3|M_AXI_GMEMM' is valid
INFO: [XOCC 60-690] User connection 'core|OCL_REGION_0|M03_AXI' is valid
INFO: [XOCC 60-645] kernel flags are '-g -D GMEM_M=0 -D TEST_SDX=1 -D GEMX_dataType=short -D GEMX_dataEqIntType=short -D GEMX_ddrWidth=32 -D GEMX_argInstrWidth=1 -D GEMX_numInstr=16 -D GEMX_gemvkVectorBlocks=512 -D GEMX_gemvmVectorBlocks=512 -D GEMX_gemvmGroups=1 -D GEMX_gemmMBlocks=8 -D GEMX_gemmKBlocks=8 -D GEMX_gemmNBlocks=8 -D GEMX_fracBitsIn=0 -D GEMX_fracBitsOut=0 -D GEMX_macBits=32 -D GEMX_transpBlocks=1 -D GEMX_spmvWidth=8 -D GEMX_spmvkVectorBlocks=2048 -D GEMX_spmvMacGroups=4 -D GEMX_spmvColAddIdxBits=2 -D GEMX_spmvPadA=1 -D GEMX_spmvNumCblocks=1024 -D GEMX_spmvFloatPerDesc=4 -D GEMX_idxType=int32_t -D GEMX_nnzBlocks=8 -D GEMX_spmvKmaxBlocks=32768 -D GEMX_spmvMmaxBlocks=32768 -D GEMX_argPipeline=2 -D GEMX_part=ku115 -D GEMX_useURAM=1 -D GEMX_splitMesh=0 -D GEMX_runGemv=0 -D GEMX_runGemm=1 -D GEMX_runTransp=0 -D GEMX_runSpmv=0 -D GEMX_numKernels=4 -D GEMX_kernelId=3 -I /home/sdx/sdx/gemx/gemx/src -std=c++0x -g'
INFO: [XOCC 60-645] kernel flags are '-g -D GMEM_M=0 -D TEST_SDX=1 -D GEMX_dataType=short -D GEMX_dataEqIntType=short -D GEMX_ddrWidth=32 -D GEMX_argInstrWidth=1 -D GEMX_numInstr=16 -D GEMX_gemvkVectorBlocks=512 -D GEMX_gemvmVectorBlocks=512 -D GEMX_gemvmGroups=1 -D GEMX_gemmMBlocks=8 -D GEMX_gemmKBlocks=8 -D GEMX_gemmNBlocks=8 -D GEMX_fracBitsIn=0 -D GEMX_fracBitsOut=0 -D GEMX_macBits=32 -D GEMX_transpBlocks=1 -D GEMX_spmvWidth=8 -D GEMX_spmvkVectorBlocks=2048 -D GEMX_spmvMacGroups=4 -D GEMX_spmvColAddIdxBits=2 -D GEMX_spmvPadA=1 -D GEMX_spmvNumCblocks=1024 -D GEMX_spmvFloatPerDesc=4 -D GEMX_idxType=int32_t -D GEMX_nnzBlocks=8 -D GEMX_spmvKmaxBlocks=32768 -D GEMX_spmvMmaxBlocks=32768 -D GEMX_argPipeline=2 -D GEMX_part=ku115 -D GEMX_useURAM=1 -D GEMX_splitMesh=0 -D GEMX_runGemv=0 -D GEMX_runGemm=1 -D GEMX_runTransp=0 -D GEMX_runSpmv=0 -D GEMX_numKernels=4 -D GEMX_kernelId=2 -I /home/sdx/sdx/gemx/gemx/src -std=c++0x -g'
INFO: [XOCC 60-645] kernel flags are '-g -D GMEM_M=0 -D TEST_SDX=1 -D GEMX_dataType=short -D GEMX_dataEqIntType=short -D GEMX_ddrWidth=32 -D GEMX_argInstrWidth=1 -D GEMX_numInstr=16 -D GEMX_gemvkVectorBlocks=512 -D GEMX_gemvmVectorBlocks=512 -D GEMX_gemvmGroups=1 -D GEMX_gemmMBlocks=8 -D GEMX_gemmKBlocks=8 -D GEMX_gemmNBlocks=8 -D GEMX_fracBitsIn=0 -D GEMX_fracBitsOut=0 -D GEMX_macBits=32 -D GEMX_transpBlocks=1 -D GEMX_spmvWidth=8 -D GEMX_spmvkVectorBlocks=2048 -D GEMX_spmvMacGroups=4 -D GEMX_spmvColAddIdxBits=2 -D GEMX_spmvPadA=1 -D GEMX_spmvNumCblocks=1024 -D GEMX_spmvFloatPerDesc=4 -D GEMX_idxType=int32_t -D GEMX_nnzBlocks=8 -D GEMX_spmvKmaxBlocks=32768 -D GEMX_spmvMmaxBlocks=32768 -D GEMX_argPipeline=2 -D GEMX_part=ku115 -D GEMX_useURAM=1 -D GEMX_splitMesh=0 -D GEMX_runGemv=0 -D GEMX_runGemm=1 -D GEMX_runTransp=0 -D GEMX_runSpmv=0 -D GEMX_numKernels=4 -D GEMX_kernelId=0 -I /home/sdx/sdx/gemx/gemx/src -std=c++0x -g'
INFO: [XOCC 60-645] kernel flags are '-g -D GMEM_M=0 -D TEST_SDX=1 -D GEMX_dataType=short -D GEMX_dataEqIntType=short -D GEMX_ddrWidth=32 -D GEMX_argInstrWidth=1 -D GEMX_numInstr=16 -D GEMX_gemvkVectorBlocks=512 -D GEMX_gemvmVectorBlocks=512 -D GEMX_gemvmGroups=1 -D GEMX_gemmMBlocks=8 -D GEMX_gemmKBlocks=8 -D GEMX_gemmNBlocks=8 -D GEMX_fracBitsIn=0 -D GEMX_fracBitsOut=0 -D GEMX_macBits=32 -D GEMX_transpBlocks=1 -D GEMX_spmvWidth=8 -D GEMX_spmvkVectorBlocks=2048 -D GEMX_spmvMacGroups=4 -D GEMX_spmvColAddIdxBits=2 -D GEMX_spmvPadA=1 -D GEMX_spmvNumCblocks=1024 -D GEMX_spmvFloatPerDesc=4 -D GEMX_idxType=int32_t -D GEMX_nnzBlocks=8 -D GEMX_spmvKmaxBlocks=32768 -D GEMX_spmvMmaxBlocks=32768 -D GEMX_argPipeline=2 -D GEMX_part=ku115 -D GEMX_useURAM=1 -D GEMX_splitMesh=0 -D GEMX_runGemv=0 -D GEMX_runGemm=1 -D GEMX_runTransp=0 -D GEMX_runSpmv=0 -D GEMX_numKernels=4 -D GEMX_kernelId=1 -I /home/sdx/sdx/gemx/gemx/src -std=c++0x -g'
ERROR: [XOCC 17-1309] Gcc: /home/sdx/sdx/gemx/gemx/out_cpu_emu/_xocc_link_gemx_gemx.dir/impl/kernels/gemxKernel_2/gemxKernel_2/cpu_sources/gemx_kernel.cpp:50: multiple definition of kernelOpLow' ERROR: [XOCC 17-1309] Gcc: gemxKernel_3/gemxKernel_3.csim_cu.a(gemx_kernel.o):/home/sdx/sdx/gemx/gemx/out_cpu_emu/_xocc_link_gemx_gemx.dir/impl/kernels/gemxKernel_3/gemxKernel_3/cpu_sources/gemx_kernel.cpp:50: first defined here ERROR: [XOCC 17-1309] Gcc: /home/sdx/sdx/gemx/gemx/out_cpu_emu/_xocc_link_gemx_gemx.dir/impl/kernels/gemxKernel_0/gemxKernel_0/cpu_sources/gemx_kernel.cpp:50: multiple definition of kernelOpLow'
ERROR: [XOCC 17-1309] Gcc: gemxKernel_3/gemxKernel_3.csim_cu.a(gemx_kernel.o):/home/sdx/sdx/gemx/gemx/out_cpu_emu/_xocc_link_gemx_gemx.dir/impl/kernels/gemxKernel_3/gemxKernel_3/cpu_sources/gemx_kernel.cpp:50: first defined here
ERROR: [XOCC 17-1309] Gcc: /home/sdx/sdx/gemx/gemx/out_cpu_emu/_xocc_link_gemx_gemx.dir/impl/kernels/gemxKernel_1/gemxKernel_1/cpu_sources/gemx_kernel.cpp:50: multiple definition of kernelOpLow' ERROR: [XOCC 17-1309] Gcc: gemxKernel_3/gemxKernel_3.csim_cu.a(gemx_kernel.o):/home/sdx/sdx/gemx/gemx/out_cpu_emu/_xocc_link_gemx_gemx.dir/impl/kernels/gemxKernel_3/gemxKernel_3/cpu_sources/gemx_kernel.cpp:50: first defined here ERROR: [XOCC 60-398] g++ failed ERROR: [XOCC 60-626] Kernel link failed to complete ERROR: [XOCC 60-703] Failed to finish linking make[1]: *** [out_cpu_emu/gemx.xclbin] Error 1 make[1]: Leaving directory /home/sdx/sdx/gemx/gemx'
make: warning: Clock skew detected. Your build may be incomplete.

can't get correct frequency

Hi, I run the command "gemx_func_test" in the shell "run_app.sh" from the latest version of gemx, but I can't get the correct frequency , and the INFO information is "INFO: kernel xclbin frequency is MHz", is there anything wrong? I notice that there is no shell but SHELL definition in the Makefile.

param:compiler.acceleratorBinaryContent="dcp" or "bitstream"

I use AWS EC2 f1 instance to run gemx. With (this AMI)[https://aws.amazon.com/marketplace/pp/B06VVYBLZZ]
however after I compile the gemm_kernel.h into gemm.xclbin and upload it to AWS to create AFI, I got this error:

{
    "FpgaImages": [
        {
            "UpdateTime": "2018-07-23T10:18:14.000Z", 
            "Name": "overlay_2", 
            "Tags": [], 
            "PciId": {
                "SubsystemVendorId": "0xfedd", 
                "VendorId": "0x1d0f", 
                "DeviceId": "0xf000", 
                "SubsystemId": "0x1d51"
            }, 
            "FpgaImageGlobalId": "agfi-066b09c66343492a7", 
            "Public": false, 
            "State": {
                "Message": "UNKNOWN_BITSTREAM_GENERATE_ERROR: An unexpected error occurred generating the bitstream", 
                "Code": "failed"
            }, 
            "ShellVersion": "0x04261818", 
            "OwnerId": "532726133341", 
            "FpgaImageId": "afi-0cb323a4335e95e92", 
            "CreateTime": "2018-07-23T10:13:06.000Z", 
            "Description": "overlay_2"
        }
    ]
}

and here is the log file on aws s3 bucket

#-----------------------------------------------------------
# Vivado v2017.4.op (64-bit)
# SW Build 2193837 on Tue Apr 10 18:06:59 MDT 2018
# IP Build 2189296 on Tue Apr 10 19:39:46 MDT 2018
# Start of session at: Mon Jul 23 01:59:17 2018
# Process ID: 1961
# Current directory: /home/builder/scripts
# Command line: vivado -mode batch -source ingest.tcl
# Log file: /home/builder/scripts/vivado.log
# Journal file: /home/builder/scripts/vivado.jou
#-----------------------------------------------------------
source ingest.tcl
# set userDCP "../checkpoints/SH_CL_routed.dcp"
# set awsDCP  "../checkpoints/SH_CL_BB_routed.dcp"
# set powerDefaultRPT "../reports/power_report.default.rpt"
# set powerStaticRPT  "../reports/power_report.static.rpt"
# set timingRPT       "../reports/SH_CL_final_timing_summary.rpt"
# set ioRPT           "../reports/report_io.rpt"
# set partialBIT      "../bitstreams/SH_CL_final_pblock_CL_partial.bit"
# set partialLTX      "../bitstreams/SH_CL_final_pblock_CL_partial.ltx"
# set CL_PATH WRAPPER_INST/CL
# puts "Ingest start time: \[[clock format [clock seconds] -format {%a %b %d %H:%M:%S %Y}]\]"
Ingest start time: [Mon Jul 23 02:01:30 2018]
# set_param hd.supportClockNetCrossDiffReconfigurablePartitions 1
# set_param hd.platformVerifyCachedRun false
# check_integrity $userDCP
ERROR: [Vivado 12-5532] The design checkpoint file failed integrity check (code '-1'): /home/builder/checkpoints/SH_CL_routed.dcp
INFO: [Common 17-206] Exiting Vivado at Mon Jul 23 02:01:31 2018...
[stdout]

****** Vivado v2017.4.op (64-bit)
  **** SW Build 2193837 on Tue Apr 10 18:06:59 MDT 2018
  **** IP Build 2189296 on Tue Apr 10 19:39:46 MDT 2018
    ** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

source ingest.tcl
# set userDCP "../checkpoints/SH_CL_routed.dcp"
# set awsDCP  "../checkpoints/SH_CL_BB_routed.dcp"
# set powerDefaultRPT "../reports/power_report.default.rpt"
# set powerStaticRPT  "../reports/power_report.static.rpt"
# set timingRPT       "../reports/SH_CL_final_timing_summary.rpt"
# set ioRPT           "../reports/report_io.rpt"
# set partialBIT      "../bitstreams/SH_CL_final_pblock_CL_partial.bit"
# set partialLTX      "../bitstreams/SH_CL_final_pblock_CL_partial.ltx"
# set CL_PATH WRAPPER_INST/CL
# puts "Ingest start time: \[[clock format [clock seconds] -format {%a %b %d %H:%M:%S %Y}]\]"
Ingest start time: [Mon Jul 23 02:01:30 2018]
# set_param hd.supportClockNetCrossDiffReconfigurablePartitions 1
# set_param hd.platformVerifyCachedRun false
# check_integrity $userDCP
INFO: [Common 17-206] Exiting Vivado at Mon Jul 23 02:01:31 2018...
[stderr]
ERROR: [Vivado 12-5532] The design checkpoint file failed integrity check (code '-1'): /home/builder/checkpoints/SH_CL_routed.dcp

After some trial and error, I change a parameter in the step of compiling gemx.xo to gemx.xclbin
param:compiler.acceleratorBinaryContent="bitstream" to param:compiler.acceleratorBinaryContent="dcp", and I successfully build the AFI without an error.
Can I create an AFI with a xclbin file that param:compiler.acceleratorBinaryContent is set to bitstream?
Also, though I build AFI successfully, the example program gemx_api_gemm.exe stuck at waiting the kernel to return. Can somebody help me out with this issue?
Thank you!

xclbin_get_freq.pl: command not found

Making 'run_hw' seems work OK, but it reports /bin/bash: xclbin_get_freq.pl: command not found, which can be found from the message below.

 $ make run_hw SDA_FLOW=hw GEMX_ddrWidth=32 GEMX_numKernels=1\
         GEMX_runGemv=0 GEMX_runGemm=1 GEMX_runTransp=0\
         GEMX_part=kcu1500\
         GEMX_kernelHlsFreq=250\
         GEMX_kernelVivadoFreq=250

Here is last few lines of message.

Output message (Click to expand)
... ...
unning xbinst...
/opt/Xilinx/SDx/2018.2/platforms/../bin/xbinst --platform_repo_paths=/opt/Xilinx/SDx/2018.2/platforms/xilinx_kcu1500_dynamic_5_0 --platform xilinx_kcu1500_dynamic_5_0 -d out_hw

****** xbinst v2018.2 (64-bit)
  **** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

Attempting to get a license: ap_opencl
Feature available: ap_opencl
INFO: [XBINST 60-895]   Target platform: /opt/Xilinx/SDx/2018.2/platforms/xilinx_kcu1500_dynamic_5_0/xilinx_kcu1500_dynamic_5_0.xpfm
INFO: [XBINST 60-267] Packaging for PCIe...
INFO: [XBINST 60-1032] Extracting DSA to ./.Xil/xbinst-30085-kal-Z87-HD3/xilinx_kcu1500_dynamic_5_0
INFO: Adding section [CLEARING_BITSTREAM (1)] using: 'xilinx_kcu1500_' (1686170 Bytes)
INFO: Adding section [FIRMWARE (3)] using: 'mgmt' (23192 Bytes)
INFO: Adding section [SCHED_FIRMWARE (5)] using: 'sched' (9748 Bytes)
Successfully completed 'xclbincat'
INFO: [XBINST 60-268] Packaging for PCIe...COMPLETE
INFO: [XBINST 60-667] xbinst has successfully created a board installation directory at /mnt/adki/work/seminars/20180403_OpenCL/master/codes.ref.sdaccel/Xilinx_Gemm/gemx/gemx.adki/out_hw.
/bin/bash: xclbin_get_freq.pl: command not found
INFO: kernel xclbin frequency is MHz
INFO: THE BOARD RUN WILL USE out_host/gemx_host.exe out_hw/gemx.xclbin out_host/app.bin out_hw/app_out.bin

My environment at local.

  • Vivado 2018.2 with SDx 2018.2
  • KCU1500

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