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vexriscv_verilog_xilinx

Generated Verilog files of VexRiscV for Xilinx FPGA

vexriscv_with_hw-gdb_server

VexRiscV system with GDB-Server in Hardware

vfftpack-cmake

📖 Fork of FFTPACK with added CMake support

vfio-isolate

CPU and memory isolation for VFIO

vfly

推力矢量可倾转多旋翼Gazebo仿真：PID ADRC

vfs

Rethinking Self-Supervised Correspondence Learning: A Video Frame-level Similarity Perspective, in ICCV 2021 (Oral)

vg_rtl

All RTL codes of VG project

vg_specification

All specifications of VG project

vga-clock

vga_lite-ice40hx

SPI/Bus VGA Card

vgg16_accelerator

vgpu_unlock

Unlock vGPU functionality for consumer grade GPUs.

vhdl-enigma-ice40

Automatically exported from code.google.com/p/vhdl-enigma

vhdl-extras

Flexible VHDL library

vhdl-systolic-array-matrix-multiplication

Systolic Array Matrix Multiplication

vhdl-utilities

Miscellaneous VHDL modules. Includes Xilinx ISE testbench and wave configuration files.

vhdl2verilog

Hardware Description Language Translator

vhdl_float

VHDL floating point library for synthesis in fpga

vhdl_prng

Pseudo Random Number Generators as synthesizable VHDL code

vhdlcryptocoprocessor

A crypto coprocessor in vhdl and simulation code to test it.

vhdlproc

VHDLproc is a VHDL preprocessor

vhdplus_libraries_and_examples

This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with future updates.

vht

vi-stereo-dso

Direct sparse odometry combined with stereo cameras and IMU

vibe

Official implementation of CVPR2020 paper "VIBE: Video Inference for Human Body Pose and Shape Estimation"

vicon2gt

Vicon-IMU fusion for groundtruth trajectory generation.

vicuna

RISC-V Zve32x Vector Coprocessor

vid-fusion

VID-Fusion: Robust Visual-Inertial-Dynamics Odometry for Accurate External Force Estimation

vidar

vidbo

Virtual Development Board